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  1. #1
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    Vilefly Thanks for the pics. They give some good hints.
    Did the dwell time input decrease gradually with rpm increase.
    If that is the case it can be calculated from the low res input or be a function of it. If that scaling can be turned off there will be always 5ms dwell available. Engine will run like crap at high rpm though but with 8 coils will be fine.
    What some of you miss is that there is always 90 degree charging time for the coil available, and that doesn`t depend on commanded spark advance.
    At 6000 rpm that will be 2.5ms between pulses.

    Can I assume that 5 volts on the est charge the coil and 0 volts fires the coil.
    I guess there is end of spark time just like end of injection and dwell is controlled by similar means.
    End of dwell time is calculated to happen at commanded spark advance degrees.

  2. #2
    Fuel Injected! vilefly's Avatar
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    kur40,
    The dwell transition was smooth, and went down with increasing rpm.
    0v fires the coil, yup.
    Unfortunately, for the full 90 deg to be available, one would need a very fat rotor to get away it. but I have no definite intention of changing the spark advance much. So stock will still work for me. The 8 coils would allow one to reprogram a crazy-ass timing curve for sure.

  3. #3
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    Quote Originally Posted by vilefly View Post
    Unfortunately, for the full 90 deg to be available, one would need a very fat rotor to get away it. but I have no definite intention of changing the spark advance much. So stock will still work for me. The 8 coils would allow one to reprogram a crazy-ass timing curve for sure.
    I don't think you're understanding the maximum 90* of dwell number. This is a physical limit based on the basic engine layout of the LT1 and the fact that a single coil is being used in the ignition system. It has nothing to do with the timing advance being used. As long as the LT1 PCM is kept in control it also doesn't change even when switching to 8 coils.

    On this engine, a cylinder fires every 90* of crank rotation. At most, a single coil ignition system can have the coil turned-on to magnetically charge it for the whole time between each ignition event. This will end up being a little less than 90* of crank rotation, but lets call it 90* just for simplicity.

    At 6000 rpm, 90* of crank rotation is 2.5mS. That is the theoretical maximum possible dwell at 6000 rpm. Of course, some of that time will be lost firing the ignition and turning the coil back on so in practice the dwell time will be less. What this means is that the 3.2mS you measured can't be the minimum possible dwell of the LT1 ignition system. It is physically impossible to have that much dwell at any RPM above 4687 rpm and still fire every cylinder on it's compression stroke.

    All the above assumes you turn the coil back on to begin charging it again right after it fires, not at the next TDC event where you see the next low-res signal. Turning it back on at the next TDC event or leading edge of the next low-res signal will significantly reduce the dwell time.

  4. #4
    Fuel Injected! vilefly's Avatar
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    Well, I know I didn't rev past 4500 rpm in a no-load condition. You just don't do that sort of thing on a stock engine for safety concerns. I merely meant the rpm was above 4k rpm, since my outdated scope didn't have a rpm readout along with the scope pattern. If I had the newer scope, you would have seen more info, for sure. I should have mentioned that.
    As to the crazy-ass curve, I was referring to the maximum potential of having 8 coils, with advancing coil charging by 2 ignition events, and such. This is probably the strategy all the racers want, and maybe the original LTCC provides, but we have no proof yet. It would be nice, though.

  5. #5
    Fuel Injected! spfautsch's Avatar
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    Quote Originally Posted by vilefly View Post
    As to the crazy-ass curve, I was referring to the maximum potential of having 8 coils, with advancing coil charging by 2 ignition events, and such.
    I think you still might be confusing Spark Advance with coil charging (dwell) somewhat.

    Just for the sake of sanity let's establish terminology. Dwell is when the EST line (or whatever is controlling a coil per cylinder or waste spark setup) goes high (or possibly low) to cause the ignition control module (principally a huge transistor) to turn on and charge the coil. When the EST line goes low or turns off the coil's magnetic field collapses, resulting in the high energy discharge (aka the spark event). Optimum dwell time is where the coil has generated the largest magnetic field the transformer core can sustain, causing the "fattest" discharge. It is a function of diminishing returns - more dwell creates more energy up to the coil's saturation point, and beyond that more dwell simply creates wear and tear on the components because the energy has to go somewhere so it heats the coil and components and is thus dissipated.

    In the "good old days" when this was controlled by mechanical point contacts, dwell was usually referred to in degrees. This is where the potential 90 degrees comes in because of the inherent nature of a crossplane v8.

    Spark advance and dwell are related as such - the spark event happens at the end of dwell time and lasts a very short time. For a distributor setup the rotor has to have it's conductive end in proximity to the corresponding tower post for the secondary energy to be transferred to the post, plug wire, etc. The size of the conductive "arc" of the Opti and most HEI2 rotors is elongated like it is because there's no mechanical advance system such as in the original HEI.

    Any arguments?

    Quote Originally Posted by vilefly View Post
    This is probably the strategy all the racers want,
    You don't have to be a "racer" or a hot rodder to benefit from healthy combustion ignition. Coil per cylinder setups are being used almost exclusively on current vehicles because they promote more complete combustion which can reduce emissions and increase efficiency. Everybody likes improved efficiency, right?

    Quote Originally Posted by vilefly View Post
    and maybe the original LTCC provides, but we have no proof yet.
    I think if delcowizzid's claim is accurate that's pretty strong evidence that the LTCC module is commanding quite a bit of dwell time, at least during cranking which makes sense. I believe the (edit: ls coil dwell limiter) number I've seen is 8 milliseconds, which is a proverbial crap-ton of dwell.

  6. #6
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    Quote Originally Posted by vilefly View Post
    As to the crazy-ass curve, I was referring to the maximum potential of having 8 coils, with advancing coil charging by 2 ignition events, and such. This is probably the strategy all the racers want, and maybe the original LTCC provides, but we have no proof yet. It would be nice, though.

    With a properly done single coil ignition system, the timing advance has no effect on the dwell. The rpm is what limits the dwell.

    With a properly done eight coil ignition system, the timing advance has no effect on dwell even when using one common signal to tell each coil when to fire. The rpm will have no effect on dwell either.

    Maintaining an ideal constant dwell IS the main advantage of 8 coils, since that means you're providing the cylinders with the strongest possible spark at all times.



    Quote Originally Posted by vilefly View Post
    According to this page http://www.megamanual.com/seq/coils.htm shows the LS2 coil (12573190) having a minimum dwell time of 1.760 mSec.

    I predict you will run into this minimum coil dwell time somewhere between 4000 rpm and 5000 rpm assuming you're using around 36* of timing and you are switching to the next required coil at each TDC event (or each low-res leading edge).
    Last edited by lionelhutz; 11-14-2017 at 11:39 PM.

  7. #7
    Fuel Injected! spfautsch's Avatar
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    Quote Originally Posted by lionelhutz View Post
    With a properly done eight coil ignition system, the timing advance has no effect on dwell even when using one common signal to tell each coil when to fire. The rpm will have no effect on dwell either.
    We'll have to agree to disagree on this point. At least from the implementation standpoint, I believe I have to know spark advance because dwell (measured either in time or hint: degrees) is in essence "added" to the (edit: lead up to the) firing event. It gets a little sticky in that we need to follow the falling edge of the EST line to know when to end dwell and let the coil fire. Even stickier that dwell may need to be started before the preceding cylinder's coil is fired.

    Quote Originally Posted by lionelhutz View Post
    assuming ... you are switching to the next required coil at each TDC event (or each low-res leading edge).
    I don't intend to do it that way, so it won't be a limitation.

    This is what I was dreaming about last night. This may end up a failure, but it will be a spectacular one.

    Code:
    #define DWELL_TGT 4.0
    #define DWELL_MAX 4.5
    #define VOLT_COMP_8 2.4
    #define VOLT_COMP_10 0.9
    #define VOLT_COMP_14 -0.5
    #define VOLT_COMP_16 -0.9
    
    #define CRANKING_SPK_ADV 14 // in the $EE cal this is skewed against ECT so ???
    #define RUNNING_RPM 400 // assume engine is running after reaching this speed
    
    typedef struct
    {
      int dwell8V;
      int dwell10V;
      int dwell12V;
      int dwell14V;
      int dwell16V;
    } dwell
    
    dwell dwellTable[27];
    
    int rpmReference[27] = { 400, 600, 800, 1000, 1200, 1400, 
      1600, 1800, 2000, 2200, 2400, 2600, 2800, 3000, 3200, 3400, 
      3600, 3800, 4000, 4400, 4800, 5200, 5600, 6000, 6400, 6800 };

  8. #8
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    So this is the suspect routine for dwell calculations.
    It relies heavily on low res, old low res, delta low res, ign voltage, rpm and map.
    Still have no clue what it does.

    Code:
    RESERVED:3E0C loc_3E0C:                               ; CODE XREF: OC4I+40Bj
    RESERVED:3E0C                 bclr    byte_25 $20 ; ' '
    RESERVED:3E0F                 ldd     word_13D
    RESERVED:3E12                 lsrd
    RESERVED:3E13                 lsrd
    RESERVED:3E14                 lsrd
    RESERVED:3E15                 coma
    RESERVED:3E16                 comb
    RESERVED:3E17                 addd    word_13D
    RESERVED:3E1A                 bpl     loc_3E1F
    RESERVED:3E1C                 ldd     #0
    RESERVED:3E1F
    RESERVED:3E1F loc_3E1F:                               ; CODE XREF: OC4I+420j
    RESERVED:3E1F                 std     word_13D
    RESERVED:3E22                 ldd     word_A1
    RESERVED:3E24                 std     word_135
    RESERVED:3E27                 ldaa    #$FF
    RESERVED:3E29                 ldab    word_16B
    RESERVED:3E2C                 subb    byte_16D
    RESERVED:3E2F                 bcs     loc_3E35
    RESERVED:3E31                 cmpb    #$20 ; ' '
    RESERVED:3E33                 bcc     loc_3E53
    RESERVED:3E35
    RESERVED:3E35 loc_3E35:                               ; CODE XREF: OC4I+435j
    RESERVED:3E35                 ldd     #$4000
    RESERVED:3E38                 cpd     word_135
    RESERVED:3E3C                 bls     loc_3E56        ; above 60 rpm
    RESERVED:3E3E                 cpd     word_137
    RESERVED:3E42                 bls     loc_3E56
    RESERVED:3E44                 ldd     word_137
    RESERVED:3E47                 subd    word_135
    RESERVED:3E4A                 lsld
    RESERVED:3E4B                 subd    word_13D
    RESERVED:3E4E                 bmi     loc_3E56
    RESERVED:3E50                 addd    word_13D
    RESERVED:3E53
    RESERVED:3E53 loc_3E53:                               ; CODE XREF: OC4I+439j
    RESERVED:3E53                 std     word_13D
    RESERVED:3E56
    RESERVED:3E56 loc_3E56:                               ; CODE XREF: OC4I+442j
    RESERVED:3E56                                         ; OC4I+448j ...
    RESERVED:3E56                 ldd     word_16B
    RESERVED:3E59                 std     word_16B+1
    RESERVED:3E5C                 ldd     word_135
    RESERVED:3E5F                 lsrd
    RESERVED:3E60                 lsrd
    RESERVED:3E61                 lsrd
    RESERVED:3E62                 cpd     word_13D
    RESERVED:3E66                 bcc     loc_3E6B
    RESERVED:3E68                 std     word_13D
    RESERVED:3E6B
    RESERVED:3E6B loc_3E6B:                               ; CODE XREF: OC4I+46Cj
    RESERVED:3E6B                 ldd     word_135
    RESERVED:3E6E                 std     word_137
    RESERVED:3E71                 ldd     #0
    RESERVED:3E74                 brset   byte_23 $80 loc_3E7B ; 'À'
    RESERVED:3E78                 ldd     word_2048
    RESERVED:3E7B
    RESERVED:3E7B loc_3E7B:                               ; CODE XREF: OC4I+47Aj
    RESERVED:3E7B                 std     word_145
    RESERVED:3E7E                 ldab    byte_128
    RESERVED:3E81                 cmpb    #$2D ; '-'
    RESERVED:3E83                 bcc     loc_3E87
    RESERVED:3E85                 ldab    #$2D ; '-'
    RESERVED:3E87
    RESERVED:3E87 loc_3E87:                               ; CODE XREF: OC4I+489j
    RESERVED:3E87                 subb    byte_204B
    RESERVED:3E8A                 clra
    RESERVED:3E8B                 xgdx
    RESERVED:3E8C                 ldd     word_204C
    RESERVED:3E8F                 idiv
    RESERVED:3E90                 ldd     word_135
    RESERVED:3E93                 cpd     word_204E
    RESERVED:3E97                 bhi     loc_3EB1        ; bra below 3400 rpm
    RESERVED:3E99                 ldd     word_204E
    RESERVED:3E9C                 subd    word_135
    RESERVED:3E9F                 lsrd
    RESERVED:3EA0                 adcb    #0
    RESERVED:3EA2                 adca    #0
    RESERVED:3EA4                 std     word_143
    RESERVED:3EA7                 xgdx
    RESERVED:3EA8                 subd    word_143
    RESERVED:3EAB                 bcc     loc_3EB0
    RESERVED:3EAD                 ldd     #0
    RESERVED:3EB0
    RESERVED:3EB0 loc_3EB0:                               ; CODE XREF: OC4I+4B1j
    RESERVED:3EB0                 xgdx
    RESERVED:3EB1
    RESERVED:3EB1 loc_3EB1:                               ; CODE XREF: OC4I+49Dj
    RESERVED:3EB1                 stx     word_13F
    RESERVED:3EB4                 ldd     word_135
    RESERVED:3EB7                 lsrd
    RESERVED:3EB8                 lsrd
    RESERVED:3EB9                 lsrd
    RESERVED:3EBA                 lsrd
    RESERVED:3EBB                 std     word_A3
    RESERVED:3EBD                 addd    word_145
    RESERVED:3EC0                 addd    word_13D
    RESERVED:3EC3                 addd    word_13F
    RESERVED:3EC6                 std     word_13B
    RESERVED:3EC9                 ldx     word_2052
    RESERVED:3ECC                 ldaa    byte_160
    RESERVED:3ECF                 cmpa    byte_2050
    RESERVED:3ED2                 bls     loc_3EDF
    RESERVED:3ED4                 ldaa    word_16E
    RESERVED:3ED7                 cmpa    byte_2051
    RESERVED:3EDA                 bls     loc_3EDF
    RESERVED:3EDC                 ldx     word_2054
    RESERVED:3EDF
    RESERVED:3EDF loc_3EDF:                               ; CODE XREF: OC4I+4D8j
    RESERVED:3EDF                                         ; OC4I+4E0j
    RESERVED:3EDF                 stx     word_143C
    RESERVED:3EE2                 pshx
    RESERVED:3EE3                 tsx
    RESERVED:3EE4                 ldd     word_135
    RESERVED:3EE7                 subd    0,x
    RESERVED:3EE9                 pulx
    RESERVED:3EEA                 cpd     word_13B
    RESERVED:3EEE                 bcs     loc_3EF3
    RESERVED:3EF0                 ldd     word_13B
    RESERVED:3EF3
    RESERVED:3EF3 loc_3EF3:                               ; CODE XREF: OC4I+4F4j
    RESERVED:3EF3                 std     word_139
    RESERVED:3EF6                 std     word_141C
    RESERVED:3EF9                 subd    word_A3
    RESERVED:3EFB                 cpd     word_13F
    RESERVED:3EFF                 bls     loc_3F04
    RESERVED:3F01                 ldd     word_13F
    RESERVED:3F04
    RESERVED:3F04 loc_3F04:                               ; CODE XREF: OC4I+505j
    RESERVED:3F04                 std     word_141
    RESERVED:3F07                 bne     loc_3F0C
    RESERVED:3F09                 ldd     #1
    RESERVED:3F0C
    RESERVED:3F0C loc_3F0C:                               ; CODE XREF: OC4I+50Dj
    RESERVED:3F0C                 std     word_1440
    RESERVED:3F0F                 brset   byte_23 $80 loc_3F40 ; 'À'
    RESERVED:3F13                 ldd     word_139        ; at eng off
    RESERVED:3F16                 ldx     word_135
    RESERVED:3F19                 fdiv
    RESERVED:3F1A                 ldaa    #$B4 ; '+'
    RESERVED:3F1C                 pshx
    RESERVED:3F1D                 tsx
    RESERVED:3F1E                 psha
    RESERVED:3F1F                 ldab    1,x
    RESERVED:3F21                 mul
    RESERVED:3F22                 adca    #0
    RESERVED:3F24                 pulb
    RESERVED:3F25                 psha
    RESERVED:3F26                 ldaa    0,x
    RESERVED:3F28                 mul
    RESERVED:3F29                 tsx
    RESERVED:3F2A                 addb    0,x
    RESERVED:3F2C                 adca    #0
    RESERVED:3F2E                 ins
    RESERVED:3F2F                 pulx
    RESERVED:3F30                 adda    byte_14B
    RESERVED:3F33                 tab
    RESERVED:3F34                 ldaa    #$B4 ; '+'
    RESERVED:3F36                 adda    byte_2044
    RESERVED:3F39                 sba
    RESERVED:3F3A                 tab
    RESERVED:3F3B                 lsrb
    RESERVED:3F3C                 clra
    RESERVED:3F3D                 std     word_14CE
    RESERVED:3F40

  9. #9
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    Quote Originally Posted by spfautsch View Post
    We'll have to agree to disagree on this point.
    What I wrote was true. Read it again, but don't read into it. With a properly built system, both the timing advance and rpm do not affect the dwell time. Sure, you need to know the timing advance and rpm to know when to start charging the coil, but neither affect the dwell time. You don't have the single coil limitation and with some processing power you can start the dwell of a coil before the last cylinder fires.

    You and I are both in agreement on how an ideal system would look.

  10. #10
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    Quote Originally Posted by kur4o View Post
    What some of you miss is that there is always 90 degree charging time for the coil available, and that doesn`t depend on commanded spark advance.
    At 6000 rpm that will be 2.5ms between pulses.
    Yes, with a single spark control output, there is close to 90* of crank rotation charge time available if you start charging the coil again immediately after it was fired. It can never be a full 90* because there has to be time to turn the ICM off so it triggers the coil before turning it back on again.

    But, there is never even close to 90* of crank rotation charge time available if you start charging the coil each time a low-res signal appears. If you start charging when the low-res signal appears then at most you have (90 - commanded timing advance) degrees of crank rotation available to charge the coil.

    I agree with 2.5mS being the theoretical maximum, which means the measured minimum dwell number of 3.2mS is not possible.

    It's common to find the low vacuum high rpm area of the spark tables containing 46*. At 6000rpm and 46* of advance, the theoretical maximum coil charging time is 1.22mS if the coil charging starts when a low-res pulse is received.

    Even though it can't be the real minimum dwell, the measured minimum dwell of 3.2mS above 4000rpm does indicate that the coil charging does not start when a low-res pulse is received but rather right after the coil is fired.
    Last edited by lionelhutz; 11-14-2017 at 08:07 AM. Reason: did the calculation in bold wrong.

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