Originally Posted by
Tom H
Hi,
I was able to place the ESide in bootstrap mode, just a little more complicated than I thought. I had forgotten the bit about the bootstrap places port D in wire or mode. I needed a 10K pullup there. Second is that the RX is not defaulted in my case. This is because the ribbon between E & T sides has been removed. This required a second pullup OR to be driven by my usb<-->serial cable. Since I had no connection, this floated and started a download with no valid data = crash.
This download mode is the same as I used for my 68HC11 based Opti-simulator. Thus I have the needed software to include the initial 0xFF. Probably won't get to this for a few days to try things out. Wife has some complaints re time spent.
Details to follow...
-Tom
I have run code on the ESide this morning, this is yet another tool in the box to unravel the TPU.
The code I ran is a simple "Hello World!" sort of thing. It just sits there kicking the 68HC11's COP and the PRU's watchdog while sending the message over and over. Plan is now to get a better look at the TPU. Suggestions re code to write are welcome.
Code:
* Clock source 12.5829 to the test boards 16MHZ
* Eclock 3.1457 to the test boards 4MHZ
* Baud rate for ESide 1,887.4HZ
REGISTERS EQU $1000 ;
RAMSTART EQU $0000 ;
RAMEND EQU $03FF ;
SCSR EQU $2E ;
SCDR EQU $2F ;
ORG $0000 ; SET ORIGIN
START SEI ; MASK INTERRUPTS
LDX #REGISTERS ; POINT X AT REGISTER BASE ADDRESS
LOOP LDY #HELLO ; POINT AT MESSAGE START
LDAA #$55 ; RESET 68HC11 COP
STAA $103A ; COP ARMED
LDAA #$AA ;
STAA $103A ; COP RESET
LDD #$50A0 ; RESET THE PORT REPLACEMENT
STAA $1806 ; WATCHDOG TIMER
STAB $1806 ;
WAIT_TX BRCLR SCSR,X,#$80,* ; WAIT TO TX NEXT CHAR
LDAA 0,Y ; READ MESSAGE BYTE
STAA SCDR,X ; TRANSMIT OVER SCI
INY ; POINT TO NEXT CHAR
CPY #HEND ; TEST FOR LAST OF MESSAGE
BEQ LOOP ; BACK TO 1S WAIT
BRA WAIT_TX ; SEND NEXT CHAR
HELLO DB "Hello world!!!"
DB $0A
DB $0D
HEND EQU *
END START
Again, details to follow...
-Tom
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