Sorry about the delay, guys. Here's what I've got so far. not fully accurate, since I am missing a reset for the 4-bit counter, but it should get the idea across.
Attachment 12115
Hope this clears up any misinterpretation due to my horrible way of explaining things due to constant distraction. Nothing is set in stone, yet. The LOAD input on the 4 bit counter tells it to preset a value, and start counting from there with every LOW-RES leading edge. It is positive edge clocking.
This is the datasheet on the CD54ACT161 presettable 4-bit synchronous counter.
http://www.ti.com/lit/ds/symlink/cd74act161.pdf
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