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Thread: 1997 F-Body ECM

  1. #481
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    Looking at the knock system, I ran into an interesting detail. TPU register $14CE is used by the PCM to select which of the knock sensors in dual sensor applications is in use at the moment. There is only one bit active in the register: bit 14. This bit is probably used internally by the TPU but we can't see that because it is internal only. The TPU output is on pin 11 and connects to the TSide mux circuit through the ribbon cable on pin 25.

    This is just a guess... It may be that it was intended that the TPU control the sensor select line based on the cylinder about to fire. If true, it was abandoned and looks to be all controlled by software through the register I noted above.

    Here is a snip of code that alternates between sensors

    Code:
    * In dual knock sensor applications, alternate sensors each call
    * PRU port a bit5 selects single knock sensor when set
    * Sensor(s) are disabled when the "noise" detected by the
    * knock module is below the noise floor set by calibration
    loc_9435:
    	bclr	<byte_004E $01			    ; KNOCK RETARD DISABLE FLAG
    
    	brset	<byte_004E $02 loc_9447		    ; SELECTED KNOCK SENSOR L/R: TOGGLE	EACH CALL
    	bset	<byte_004E $02			    ; SELECTED KNOCK SENSOR L/R
    
    
    	ldd	#$0000				    ; SELECT KNOCK SENSOR 2 (LEFT SIDE)
    	std	word_14CE			    ; TIO SHARED RAM: KNOCK SENSOR SELECT
    
    
    	bra	locret_9450
    
    loc_9447:
    	clrb
    	ldaa	#$40				    ; SELECT KNOCK SENSOR 1 (RIGHT SIDE)
    	std	word_14CE			    ; TIO SHARED RAM: KNOCK SENSOR SELECT
    
    	bclr	<byte_004E $02			    ; SELECTED KNOCK SENSOR L/R
    
    locret_9450:
    	rts
    -Tom

  2. #482
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    I came across another detail somewhat buried in the TPU. This relates to the register at $14FA.

    I see in the code where $14FA is accessed to determine if ASR is active.

    I am a bit fuzzy on all the three letter acronyms, not sure which are for what years and if some of them relate to the same issues. Perhaps some help here from those well versed in the history of E/PCMs? I think ASR (Automatic Slip Regulation), ASR (Acceleration Slip Regulation) and TCS (Traction Control System). In any case looking through the GM docs for the car, I will use ASR to describe this function.

    ASR looks at the status of connector C1 (Red) pin 23 to determine if spark should be retarded in the cycle to reduce engine output. Bit 3 in register $14FA matches the input. The signal enters the PCM through the connector, is conditioned by passive components (R and C) and buffered by a comparator and connected to the TPU on pin 22. I looked at this and noted that many other bits in the register were also active and changing. Some investigation later and I find that these bits contain a snapshot of the inputs and outputs to the TPU. I did not do an exhaustive look at the register as code only accesses the one bit. In the short look at the register I did find the following bits and the inputs they represent:

    BIT 2: FROM COMPARATOR: C1 RED P26
    BIT 3: AUTOMATIC SLIP REGULATION
    BIT 4: MASS AIR FLOW
    BIT 5: VEHICLE ANTI-THEFT SYSTEM (VATS)
    BIT 15: KNOCK DETECTED

    Does anyone know what connector C1 (RED) Pin 26 was used for? This might be a B body or Corvette function? My PCM omitted resistors connecting the pin to the input. To find this input I needed to probe deeper in the circuit.

    Another question: Does anyone know if the TPU uses the input pin internally or if it is just passed through to the register for software to look at?

    -Tom

  3. #483
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    I'm afraid I cannot answer the TPU-related questions.

    However, in the context of GM, "ASR" always stands for "Acceleration Slip Regulation," which was introduced alongside the Bosch 2U integrated ABS unit in the 1992 Corvette. This continued at least through the 1997 F-Body with RPO NW9.

    The owner's manual for the 1998-2002 Camaro continues to refer to this system as "Acceleration Slip Regulation": https://www.dezosmanuals.com/wp-cont...let-Camaro.pdf

    As such, it does not appear that GM, at any point, changed the meaning of its ASR acronym. "TCS" is just the generic term for any Traction Control System, of which ASR is one.

    It should be noted that several companies used Bosch ABS/ASR units, for example my friend has a 1992 Mercedes 500E which has one, and indeed has an ASR switch. According to the service manual for his vehicle, ASR stands for "Acceleration Slip Regulation." That both Mercedes and GM would use the exact same acronym suggests that ASR is in fact a Bosch acronym, and that therefore it has but a single reading. Any other reading likely came from people on internet forums over the years who spread incorrect information (for example, I've seen lots of GM boards calling it "Anti Slip Regulation").

    Hope that helps a bit!
    1990 Corvette (Manual)
    1994 Corvette (Automatic)
    1995 Corvette (Manual)

  4. #484
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    Quote Originally Posted by NomakeWan View Post
    However, in the context of GM, "ASR" always stands for "Acceleration Slip Regulation," which was introduced alongside the Bosch 2U integrated ABS unit in the 1992 Corvette. This continued at least through the 1997 F-Body with RPO NW9.
    Thank you. It's a good help for me to get the names straight. Might also make what comes out more of use.

    I am making progress looking into the TPU and will share details in a bit.

    Cheers,
    Tom

  5. #485
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    Working on the TSide schematic, I discovered additional info regarding the ICs used in this design.

    First up are the two components on the board's right side (connectors up) placed between the O2 sensor interfaces. In my schematic/ref des files that can be found somewhere in this thread the parts are named U45 and U46. I will put a picture of the earlier board TSide here
    TSide.jpg

    U45 is a quad two input or gate. This part is NOT pinned like standard HC/HCT logic but as the earlier CMOS versions. This fact cost me a bunch of time...
    For the pinout, see CD4071B
    U46 is an inverter pinned as normal hct logic is.

    The OR gates are used to:
    - Permit both T and Esides to enable VPP for programming
    - Generate the logic for transmission over ALDL
    - Provide instant response to brake application

    Here is the portion of schematic
    Logic.jpg

    The PCM uses a special (custom?) driver for the ALDL. I don't know the exact driver but have worked out most of it's function. The driver monitors the ALDL for activity to prevent collision of the receive and transmit data, necessary because ALDL is half duplex. The T & E sides look after contention for transmitting but in '97 the ESide does not transmit. The receive and transmit circuits are separate (in the same chip though) , transmit enable pin sets the direction. One of the OR gates noted above permit both E and TSides to request transmission on the ALDL.

    I know little about automatic transmission, but the last two OR gates are used to respond when brakes are applied. They affect the torque converter clutch and in manual cars the reverse lockout.

    Feeling good about this find because it gives me the understanding of all the TSide circuits.

    -Tom

  6. #486
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    The ALDL driver is the SXR chip, made specially for this purpose. It does exactly what you assumed it does; it permits the ALDL bus to work in half-duplex without collisions. In fact, if every device on the bus is using an SXR chip--which would be true for a GM-made vehicle--then no special bus master/slave pullup arrangement is required. The SXR is able to negotiate the bus in a proprietary manner. An alternative schematic exists for third-party devices which want to operate on the ALDL without an SXR chip. Attached is the SXR's pinout.

    sxrpinout.jpg
    1990 Corvette (Manual)
    1994 Corvette (Automatic)
    1995 Corvette (Manual)

  7. #487
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    Thank you NomakeWan!

    It's great to have some confirmation of parts you are less sure of.
    Looks like I also got very close to the pinout and names. Here is the schematic I drew

    aldl.jpg

  8. #488
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    I got into the latest schematic update while looking at the ESide part numbered 27474. To date this part has been a complete mystery to me, seeming to have a number of unrelated inputs & outputs. This again suggests a custom part for GM that exactly meets the need. Any additional info would be of great help but...

    This part has an internal oscillator that functions somewhere around 2khz when the external R-C is connected to pin 18. I believe the part looks after some limp home functions and some initialization functions.

    - Fan relay 1 signal is an input to the part. I believe that in certain limp conditions the fan will be turned on constant. More study needed.
    - Fuel pump signal passes through the part. At power on this is activated... this is probably the pump prime you hear when ignition is turned on.
    - Ignition output is monitored and fed through the part to the TPU.
    - Low res signal is input to the part. Probably in support of limp home

    There are several inputs from various ports I need to chase down to explore what this part is up to. My optispark simulator is of great use for this. I can simulate various faults in the optispark, and see the system reaction.

    -Tom

  9. #489
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    Preliminary schematic for the limp/init chip 27474

    Trying a .pdf file this time to keep text so you can read it...

    -Tom
    Attached Files Attached Files

  10. #490
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    The fan actually does come on when flashing the PCM on a 94-95 Corvette, so you may be spot on yet again with that theory. Unfortunately that chip I do not have any information for.
    1990 Corvette (Manual)
    1994 Corvette (Automatic)
    1995 Corvette (Manual)

  11. #491
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    Spent some time looking at the TPU internal functions. Ran into roadblocks with my schematic, so I have updated it. The schematic is for the OBDII ESide but it should be close to earlier revisions. If anyone has time and would like to compare the component layout with an earlier board it would be interesting.

    The schematic was drawn in Kicad. Kicad is a freeware tool that let me capture the design. If anyone wants the drawing files I will send them along. For most people the output PDF will be the best format and that is what is enclosed in this post below.

    The two layout files (one for component side, one for solder side) were drawn in LibraCAD. This is also a freeware tool that I used to capture the component placement on the board. This let me give each component a reference designator which I then used in the schematic. With these files, it is easy to locate the circuit and component physically on the board that relates to the schematic.

    You will need to zoom in quite close to read the text.

    Files are
    ESide schematic
    ESide layout: component side
    ESide layout: solder side

    -Tom
    Attached Files Attached Files

  12. #492
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    The PCM has a good number of options and after my work on the schematic I looked at one that gave me trouble previously. This small schematic shows the driver for the ALDL circuit. Notice at the top Q20 which is driven by the CPU port A bit 4. When that bit turns on Q20, the ALDL line is pulled high through R280. I had wondered how this circuit was used, but now I think I know. There are some vehicles (perhaps Corvette and it could be all other vehicles) other than Fbody where the PCM is not the ALDL bus master. The other cars have another computer that acts as master of the ALDL bus. In this case, the pull up would be disabled in the PCM, and this is why I can't find code in the Fbody that ever turns this circuit off. Here is the schematic

    ALDL_Master.jpg
    [ATTACH=CONFIG]
    19335
    [/ATTACH]


    The code for this is just checking the calibration option and turning on or off the resistor as per the cal. Here is the code:
    Code:
    loc_6Fee: ldaa    CPU_PORT_A         ; READ CPU PORT A
              ldab    CAL_OPTION_1       ; CALIBRATION OPTION 1
              bitb    #$10               ; OPTION: ALDL MASTER
              beq     loc_6FFC           ; ASSERT MARK PULLUP
    
              oraa    #$10               ; NOT BUS MASTER: REMOVE PULLUP FROM ALDL
              bra     loc_6FFE
    
    loc_6FFC: anda    #$EF               ; ALDL MASTER: APPLY PULLUP
    loc_6FFE: staa    CPU_PORT_A         ; UPDATE
    
              cli                        ; ENABLE INTERRUPTS
    -Tom
    Last edited by Tom H; 09-10-2023 at 06:46 PM.

  13. #493
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    You are correct. On the Corvette, we have a Central Control Module which acts as the bus master and requests data from the PCM periodically for security and other reasons (such as displaying data on our digital dashboard, as well as running the rear defroster). This was the case from 1990 all the way through 1996, so even the OBDII Corvette was still using "OBDI" ALDL for this purpose.
    1990 Corvette (Manual)
    1994 Corvette (Automatic)
    1995 Corvette (Manual)

  14. #494
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    Not too often you find GM making a mistake, so I am questioning some of my work...

    [edit]
    I didn't identify that this is the TSide board and PRU...
    [/edit]

    The external ram/port chip (PRU) has four ports and four PWM outputs. Port A direction (input/output) is controlled by the byte stored at $1801. In my code it is set to $F0 which makes the upper four bits output and the lower four as inputs. Thing is that there seem to be no connections to bits 2 or 3 on the circuit board. I can find no reference to the input in the code so as far as software is concerned these bits are not used.

    With my board running (opti simulator working... injectors and ignition firing) I have confirmed that these two bits float. It is not the best situation to have floating inputs. This can result in latchup and failure of the part.

    I plan to re-flash with changes in two places, making these unconnected pins outputs. I believe the data direction register should have been set to $FC making bits 2&3 outputs.

    I would be interested to see if the OBDI boards have the same design.

    -Tom
    Last edited by Tom H; 09-12-2023 at 05:06 PM.

  15. #495
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    Understanding system reset has always been a problem for me because of the lack of information on the custom chips present in the design. After a good number of tests I have found that the PRU is at the center of reset system design for the system. I will explain how reset is done in these boards but first the design of the PRU needs to be shown.

    Until now I have always expected that port D in the PRU is eight bits wide. Turns out this is not the case as only the lower four bits are functional. Pins 59 through 63 on the chip were always a bit of a mystery until I focused on them. Pin 59 is straight forward: it is the standby supply for the RAM. During boot, the CPU checks for a $55/$AA tag in the RAM to determine if a cold or hot boot will be performed. The standby supply keeps the RAM content such that learned parameters do not start from initialization values at each startup.
    I have found that pins 60 through 63 are part of the reset circuit. They are designed to take reset in from pin 60 and drive three open drain outputs (pins 61-63) with the input level. The open drain outputs can be driven low (active) from the reset in pin or any other IC connected to the reset out pin. Once I understood this, the system reset scheme was uncovered for me.

    The Power Management IC (PMIC) on the ESide board is the source of power on reset. I do not have data on this part, but believe that pin 13 is the source of reset that covers all the parts. I expect that the input voltage and all the regulated outputs status go into forming the power on reset output from this part. I will refer to this signal here as POR
    Code:
    U10 POR --- Ribbon cable pin 14 to TSide
            --- U51 Limp home/default chip
            --- PRU RESET_IN
    
    The PRU transferes the RESET_IN to it's three RESET_OUT pins
    
    U65 PRU --- RESET_OUT_0 --> This is ignition on reset
                            --- Ribbon cable pin 9 to TSide
                            --- Injector FET driver 
                                (two places: both source and destination for this reset)
                            --- U50 Ignition chip
                            --- U51 Limp home/default chip
                            --- U20 Black driver (discharge of ignition voltage)
    
            --- RESET_OUT_1 --- Pull up resistor (not used)
            --- RESET_OUT_2 --- ESide CPU reset
                            --- Injector FET driver
    Three signals pass between T&ESide on the ribbon cable that relate to reset. The POR and Ignition reset have already been described. In addition the TSide will send reset to the system if it's watchdog/COP expire this is done on ribbon pin 9.

    Looks like the folks at GM put a bunch of time and thought into the reset system. Reset design for a multi-micro system with all the fail safe and fault detection that this system has will never be simple.

    I am enclosing what I believe to be the pinout for the PRU. This part is a 68 pin PLCC marked 66285 466 on my boards.

    More schematic updates are needed to reflect these changes, then once again I will go after the TPU.

    -Tom

    Pinout
    Code:
    1	GROUND
    2	D3
    3	D2
    4	D1
    5	D0
    6	PORTD BIT 0
    7	PORTD BIT 1
    8	PORTD BIT 2
    9	PORTD BIT 3
    
    10	PORTC BIT 7
    11	PORTC BIT 6
    12	PORTC BIT 5
    13	PORTC BIT 4
    14	PORTC BIT 3
    15	PORTC BIT 2
    16	PORTC BIT 1
    17	PORTC BIT 0
    18	+5V
    19	PORTB BIT 7
    20	PORTB BIT 6
    21	PORTB BIT 5
    22	PORTB BIT 4
    23	PORTB BIT 3
    24	PORTB BIT 2
    25	PORTB BIT 1
    26	PORTB BIT 0
    
    27	PWMD
    28	PWMC
    29	PWMB
    30	PWMA
    31	PORTA BIT 7
    32	PORTA BIT 6
    33	PORTA BIT 5
    34	PORTA BIT 4
    35	+5V
    36	PORTA BIT 3
    37	PORTA BIT 2
    38	PORTA BIT 1
    39	PORTA BIT 0
    40	GROUND
    41	GROUND
    42	A10
    43	A9
    
    44	A8
    45	A7
    46	A6
    47	A5
    48	A4
    49	A3
    50	A2
    51	A1
    52	GROUND
    53	A0
    54	CSELECT- 
    55	R/W-
    56	ECLK
    57	GROUND
    58	GROUND
    59	VSTANDBY
    60	RESET_IN-
    
    61	RESET_OUT_0
    62	RESET_OUT_1
    63	RESET_OUT_2
    64	D7
    65	D6
    66	D5
    67	D4
    68	+5V

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