16 bit address bus on P4 ECM's

[brian89gp]

Trying to understand the 16 bit address bus on the P4 ECM. In a example address, 1111.0000.1111.0000, is A15 the leftmost and A0 the rightmost?

Would $8000 be 1000.0000.0000.0000 and $FFFF be 1111.1111.1111.1111? Pin A15 on the EEPROM is hard wired to VCC, so that would be the first "1" in the previous addresses?

[RobertISaar]

yes, A15 being the most significant bit will be furthest left. same for A0, least significant, furthest right.

your 8000 and FFFF values are correct. windows calculator in scientific mode is helpful here, just input a hex value and switch over to binary and it displays as such.

and A15 being permanantly connected to VCC is one of the more interesting things i've had to work around. i'm sure there are better ways to go about it, especially if one were to make their own MEMCAL adapter, but i simply removed the pin from the PCB, drilled a small hole through the side of the MEMCAL connector(on the PCM side), ran a pin through there, soldered a wire to it and on the other side of the wire i connected it to the A15 pin on the edgecard connector.

[RobertISaar]

though the usefulness of that.... probably nothing, since as far as i know, the PROM won't be selected(via either PROMOE or PROMCS) when addresses under $8000 are selected. that's why i need to get my own MEMCAL adapter going with some logic gates on it to force the ROMOE and ROMCS signals to be active in locations that aren't occupied by internal registers or internal/external RAM.

[brian89gp]

Cool. In the process of forcing my brain around this stuff.

Is there any reason you can think of that GM did not run A15 to the A15 pin on the EEPROM? Same effect in the end either way, just seems odd.

[RobertISaar]

to screw with everybody attempting to modify the PCMs?

i really don't know why they would have done such a thing, it limits what the engineers would have had access to if necessary.

from what has been known about them for quite some time, GM had them custom built based on one of the early versions of the 6811, i think they may have specificed to motorola to have ROMOE and ROMCS be disabled when accessing anything other than the 8000-FFFF area. why they would have done this...... IDK.

[brian89gp]

What would be an effective means of testing out an address space (backed by NVRAM)? Blank it in a programmer, map it into the circuit, write data from the ECM, take it out and read it back on the programmer to verify? I would assume that if all the address you wrote to have data in them then it is a usable addres space?

What happens if you have an overlap, such as mapping NVRAM to $1800-1fff and putting it in the 9396 ECM?

[RobertISaar]

that is one way to test it. i would likely have it blank going in, have the ECM write to it, then spit out the location over ALDL with mode 2 or 3(i can't remember which). that's for single byte locations, if you were to write a large amount of data, definitely read out in the programmer and do a compare with tunerpro or something.

and yes, i would assume if it is written to successfully and doesn't mysteriously change, it would work until the NVRAM battery dies in about a decade.

overlap? problems, to say the least. i believe the proper term is "bus contention"? some unexpected and unpredictable things will happen.

http://en.wikipedia.org/wiki/Bus_contention