Just discovered CPLDs and going to see if that will work.

Attached is the diagram. I think I got the 74HC00 wrong, the OE to the 74HC32 should be off of pin 6 and not where it is and the RW where...

Not adding code, just determining if my affinity towards SEFI is founded in fact or if it is an illogical preference then choosing an ECM based off of that determination. MPFI sure seems a lot...

Power wise, is there any benefit to firing the injector SEFI over MPFI? Also, is MPFI fired once per 360* or once per 720*? I would imagine that even with SFI the majority of injector on time at...

Trying to flush out of there is any reason to favor a SEFI ECM over MPFI.

SEFI fires each injector once per 720*? MPFI fires all injectors or a bank of injectors once per 360* or once per 720*? ...

Got the following ranges in the address blocks below drawn out in a diagram, needs a total of 7x 74 series chips which is doable by through-hole chips but SMT is probably the way to go. Each block...

Thought of two ways to accomplish this.

1. 7400 to control the write enable on the NVRAM, two or three decoder CMOS chips for the chip enable, and a couple quad OR gate chips to aggregate the chip...

have a link to those boards?

How easy would it be to transfer the needed pieces of P4 code ($A1 and $2E which is documented and simpler) to the P6? It sounds like that might be what you are contemplating with of course all of...

Starting to understand why the custom nature of the P4 68hc11 makes things difficult.

Got the schematic to address all of the above addresses with the exception of 0200-03ff and just need to...

These are the address ranges I was eyeballing, would give 15.5KB of address space. Now to figuring out the logic chips for the chip select.

0200-03ff (overlap with some P4)
0400-07ff
0800-0fff...

What would be an effective means of testing out an address space (backed by NVRAM)? Blank it in a programmer, map it into the circuit, write data from the ECM, take it out and read it back on the...

Cool. In the process of forcing my brain around this stuff.

Is there any reason you can think of that GM did not run A15 to the A15 pin on the EEPROM? Same effect in the end either way, just...

Trying to understand the 16 bit address bus on the P4 ECM. In a example address, 1111.0000.1111.0000, is A15 the leftmost and A0 the rightmost?

Would $8000 be 1000.0000.0000.0000 and $FFFF be...

P4 vs P6? 8 vs 16 bit?

What is the GM HUD? Some sort of code debugging hardware that plugs into the card edge connector? I see that $5000-$6fff and $0400-04ff addresses are for the HUD, if the HUD is not plugged in are...

Is there one timer interrupt, or many timer interrupts? I am assuming that the 160Hz timer is for the main segment loop?

If I understand correctly, if a loop is interrupted and the stack is...

Initalizing at $01FF makes sense then, it is the highest RAM address in the ECM's I'm looking at and would grow down from there. How do you determine how deep the stack can get? Count the nested...

I see references to "initalize the stack". A lot of times on the masks I look at it is initialized to $01FF. First, what is the stack? Second, what does it mean and do to initalize it?

How long does a flash through the ALDL take?

Newbie question. With the possibility of bricking the LT1 PCM, is there much of a benefit of using it over a MEMCAL based PCM?

Yea, I have a thing for SFI; its not fully rational and I admit it. I had a 94 LQ1 I switched over to 93 $DF, stock all the way around and went from 32mpg to 29mpg. The 94 $2e also ran smoother but...

The 4x being different wouldn't be a problem? I could be wrong, but I though the 4x out of the DIS modules had symmetrical waveforms vs the long/short of the optispark.

I would imagine adding a...

Would it be posible to modify the 16188051 to run with a (Northstar DIS, 60* V6 DIS, Quad 4 DIS, etc) instead of the optispark module? Is there anything specific with the 16188051 hardware that will...