P66 boost-prepared code fork anyone?

So since I drive the truck daily right now, I am going to re-build the old bench test harness and set it up with the intent of starting to delete code. Stuff I don't need. It's time to fork this thing, and get rid of crap I don't want so I can get space to add what I do want.

Things I do not need, and I don't think will be missed:

Factory Test Routines (there are several, two the size of the entire boost patch)
EGR
Charcoal canister purge

My thinking is that if I can remove these things, with no ill effects, it will provide quite a bit of room for adding in boosty accessories like boost control (possibly PWM, would need to look at the hardware again) and intercooler pump control (on/off control based on either IAT or intercooler water temp)

I can re-purpose the cooling fan control for the intercooler, but in doing so, most turbo guys would have to give up an electric fan-that's a pretty big deal in some chassis. Probably not the best output to use for this.

The carbon canister purge and EGR 1, EGR 2, and EGR 3 outputs can all handle decent current, and are all suitable for driving relays. The EGR outputs should be able to drive PWM solenoid valves as well.

The Evaporator Temperature Sensor input is a weird one, but it could probably be used as a general purpose input-it is not a normal temperature sensor A/D input. I don't know what is in the little black box that the thermistor plugs into before going to the PCM.

Before any goodies get added in, I think space should be made first. I'm gonna post what I think can go out of the disassembly, and if anyone wants to have a look I'll gladly send the disassembly via PM.

First things first, the E-Side factory test routines.

here's the first one:

F010
F010 ; =============== S U B R O U T I N E =======================================
F010
F010
F010 factory_test: ; CODE XREF: RESET_INIT2+19P
F010 CC 07 00 ldd #0x700
F013 BD F1 3A jsr analog_to_digi_plus_store_AndA_byte1F_to_1060 ; channel 7(MAP)
F016 81 05 cmpa #5
F018 22 5D bhi locret_F077
F01A CC 03 00 ldd #0x300 ; channel 3
F01D BD F1 3A jsr analog_to_digi_plus_store_AndA_byte1F_to_1060 ; channel 3 (TPS)
F020 81 FC cmpa #0xFC ; 'n'
F022 25 53 bcs locret_F077
F024 B6 10 64 ldaa byte_1064
F027 85 10 bita #0x10
F029 26 4C bne locret_F077
F02B CC 06 C0 ldd #0x6C0
F02E BD F1 3A jsr analog_to_digi_plus_store_AndA_byte1F_to_1060 ; mux channel C(CTS)
F031 81 05 cmpa #5
F033 22 42 bhi locret_F077
F035 CC 05 00 ldd #0x500
F038 BD F1 3A jsr analog_to_digi_plus_store_AndA_byte1F_to_1060 ; channel 5(IAT)
F03B 81 FC cmpa #0xFC ; 'n'
F03D 25 38 bcs locret_F077
F03F CE 03 03 ldx #0x303
F042 1D 00 80 bclr 0,x,#0x80 ; 'Ç'
F045 0E cli
F046 B6 10 08 ldaa byte_1008
F049 85 01 bita #1
F04B 27 03 beq loc_F050
F04D BD B5 55 jsr sub_B555
F050 ; ---------------------------------------------------------------------------
F050
F050 loc_F050: ; CODE XREF: factory_test+3Bj
F050 CE 0E 18 ldx #0xE18
F053
F053 loc_F053: ; CODE XREF: factory_test+50j
F053 EC 00 ldd 0,x
F055 1A 83 55 AA cpd #0x55AA
F059 26 0A bne loc_F065
F05B 08 inx
F05C 08 inx
F05D 8C 0E 20 cpx #0xE20
F060 25 F1 bcs loc_F053
F062 7E 0E 20 jmp unk_E20
F065 ; ---------------------------------------------------------------------------
F065
F065 loc_F065: ; CODE XREF: factory_test+49j
F065 FC 10 0E ldd word_100E
F068 C3 03 33 addd #0x333
F06B FD 10 18 std word_1018 ; TOC2 (160Hz interrupt)
F06E 7F 00 5E clr byte_5E ; C86: SPI Transfer buffer index
F071 7F 03 02 clr byte_302 ; SPI transfer error counter?
F074 BD F0 78 jsr FACTEST_1 ; a factory test routine
F077 ; ---------------------------------------------------------------------------
F077
F077 locret_F077: ; CODE XREF: factory_test+8j
F077 ; factory_test+12j ...
F077 39 rts
F077 ; End of function factory_test
F077
F078

I am not 100% sure that if I remove this, it won't break things I need. It *looks* like it's going through and pulling all the vital A/D inputs and comparing them to something, then at the end of the first section, either continues the test or jumps to subroutine B555. Next, it loads something at factory test 3B, and checks something for factory test 50, and either starts over or jumps to location UNK_E20. Next section, seems to test the SPI transfer bus, and then at the end jumps to "factory test routine 1" which I'll post next.

Here's FACTEST_1:

F078
F078 ; =============== S U B R O U T I N E =======================================
F078
F078 ; a factory test routine
F078 ; Attributes: noreturn
F078
F078 FACTEST_1: ; CODE XREF: factory_test+64P
F078 ; FACTEST_1+1Fj ...
F078 86 04 ldaa #4
F07A B5 10 23 bita byte_1023 ; TIC/TOC interrupt source
F07A ; b0 IC3 (VATS)
F07A ; b1 IC2 (cam sensor)
F07A ; b2 IC1 (3X crank sensor)
F07A ; b3 IC4/OC5 (24X crank sensor)
F07A ; b4 OC4
F07A ; b5 OC3 (4000 PPM VSS signal)
F07A ; b6 OC2 (160Hz interrupt)
F07A ; b7 OC1
F07D 27 06 beq loc_F085
F07F B7 10 23 staa byte_1023 ; TIC/TOC interrupt source
F07F ; b0 IC3 (VATS)
F07F ; b1 IC2 (cam sensor)
F07F ; b2 IC1 (3X crank sensor)
F07F ; b3 IC4/OC5 (24X crank sensor)
F07F ; b4 OC4
F07F ; b5 OC3 (4000 PPM VSS signal)
F07F ; b6 OC2 (160Hz interrupt)
F07F ; b7 OC1
F082 BD EF CB jsr sub_EFCB ; TIC 1
F085
F085 loc_F085: ; CODE XREF: FACTEST_1+5j
F085 86 20 ldaa #0x20 ; ' '
F087 B5 10 23 bita byte_1023 ; TIC/TOC interrupt source
F087 ; b0 IC3 (VATS)
F087 ; b1 IC2 (cam sensor)
F087 ; b2 IC1 (3X crank sensor)
F087 ; b3 IC4/OC5 (24X crank sensor)
F087 ; b4 OC4
F087 ; b5 OC3 (4000 PPM VSS signal)
F087 ; b6 OC2 (160Hz interrupt)
F087 ; b7 OC1
F08A 27 06 beq loc_F092
F08C B7 10 23 staa byte_1023 ; TIC/TOC interrupt source
F08C ; b0 IC3 (VATS)
F08C ; b1 IC2 (cam sensor)
F08C ; b2 IC1 (3X crank sensor)
F08C ; b3 IC4/OC5 (24X crank sensor)
F08C ; b4 OC4
F08C ; b5 OC3 (4000 PPM VSS signal)
F08C ; b6 OC2 (160Hz interrupt)
F08C ; b7 OC1
F08F BD EF F7 jsr toggle_4000PPM_speedo_circuit ; TOC 3
F092
F092 loc_F092: ; CODE XREF: FACTEST_1+12j
F092 86 40 ldaa #0x40 ; '@'
F094 B5 10 23 bita byte_1023 ; TIC/TOC interrupt source
F094 ; b0 IC3 (VATS)
F094 ; b1 IC2 (cam sensor)
F094 ; b2 IC1 (3X crank sensor)
F094 ; b3 IC4/OC5 (24X crank sensor)
F094 ; b4 OC4
F094 ; b5 OC3 (4000 PPM VSS signal)
F094 ; b6 OC2 (160Hz interrupt)
F094 ; b7 OC1
F097 27 DF beq FACTEST_1 ; a factory test routine
F099 B7 10 23 staa byte_1023 ; TIC/TOC interrupt source
F099 ; b0 IC3 (VATS)
F099 ; b1 IC2 (cam sensor)
F099 ; b2 IC1 (3X crank sensor)
F099 ; b3 IC4/OC5 (24X crank sensor)
F099 ; b4 OC4
F099 ; b5 OC3 (4000 PPM VSS signal)
F099 ; b6 OC2 (160Hz interrupt)
F099 ; b7 OC1
F09C FC 10 18 ldd word_1018 ; TOC 2
F09F C3 03 33 addd #0x333
F0A2 FD 10 18 std word_1018 ; TOC2 (160Hz interrupt)
F0A5 BD EF 46 jsr COP_RESET
F0A8 CC 00 00 ldd #0 ; channel 0(?)
F0AB BD F1 3A jsr analog_to_digi_plus_store_AndA_byte1F_to_1060 ; channel 0(batt volts)
F0AE 81 28 cmpa #0x28 ; '(' ; 4.0
F0B0 25 03 bcs loc_F0B5
F0B2 BD EF 50 jsr TOGGLE_1066_0x80
F0B5
F0B5 loc_F0B5: ; CODE XREF: FACTEST_1+38j
F0B5 96 00 ldaa *byte_0 ; Timer, each count is 0.00625 seconds
F0B7 4C inca
F0B8 81 0C cmpa #0xC
F0BA 25 01 bcs loc_F0BD ; branch if still lower than .075 secs
F0BC 4F clra
F0BD
F0BD loc_F0BD: ; CODE XREF: FACTEST_1+42j
F0BD 97 00 staa *byte_0 ; Timer, each count is 0.00625 seconds
F0BF 84 03 anda #3
F0C1 26 B5 bne FACTEST_1 ; a factory test routine
F0C3 BD F0 D3 jsr FACTEST_2
F0C6 BD F1 1E jsr FACTEST_3
F0C9 B6 10 08 ldaa byte_1008
F0CC 85 01 bita #1
F0CE 27 A8 beq FACTEST_1 ; a factory test routine
F0D0 BD B5 55 jsr sub_B555
F0D0 ; End of function FACTEST_1
F0D0
F0D3

At the end of this one, you can see references to two more factory test routines. If posting them is helpful, I'll keep going, otherwise, I'll wait to see how I should handle this.