Six_Shooter
03-21-2011, 03:16 AM
Original text here: http://www.diy-efi.org/gmecm/ecm_info/1227749/749.txt
1227749 bits extracted from the archives:
1227730 w/ one missing quad driver, 1 additional inkector driver FET
1987-1990 2.0 OHC L4 PFI Turbo "M" LT3
Memcals: afdz, albk
Eprom: 27C128 or 27C256
--------------
Date: Sat, 13 May 2000 00:17:23 EDT
From: ECMnut@aol.com
Subject: Re: ALDL Reported BPW
> Does "BPW" mean the *base* pulse width before all the corrections are
> multiplied in? IOW, does it just depend on the injector constant? The
> readings might make more sense then, but then the readings wouldn't
change
> w/ changing inputs to the ECU that affect PW....???
>
Whadaya mean? We established that the 749 turbo code's
injector constant value is little more than a decoration.
I know there are other variables, but I was able to
impact PW from a these tables.
All 3 of these play directly into the final pulse width, and
return a value (via table lookup) in response to
to an ECM inputs (map, rpm, or both):
1) F29_TABLE Base Pulse VE vs RPM And MAP Table
("+10 to 15" in the high MAP regions did alot)
2) F30_TABLE Base Pulse VE vs RPM Table (slight impact)
3) F61_TABLE PE AF Ratio vs NTRPMX Table (slight impact)
I gotta get a decent scope. You're havin too much fun over there.
MV Still lean.. I think my Walbro pump is dying after approx 2k miles
- -----------------------------------------------------------------
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Date: Sat, 19 Aug 2000 22:18:56 -0400
From: Shannen Durphey <shannen@grolen.com>
Subject: Re: '749 questions
EST is ecm output to module. This is the ecm generated spark signal.
REF is the square wave input to the ecm from the module. It's an RPM
signal.
Bypass allows the ecm to toggle the module between using and ignoring
EST. If there is no voltage on Bypass, the module will fire the coil
based on the pickup coil pulses. This is also the line to disconnect
to set base timing on a real engine.
Crank input is REF, no other needed, signal provided by the module in
both dizzy and DIS systems.
VSS inputs... The VSS has 2 output wires. It's an a/c signal, the ecm
is connected to both wires. Any signal buffering is internal to the
ecm.
Be sure to connect the REF LOW (black w/red tracer) between the module
and ecm.
Shannen
Just remember about if / when you starting trying to work with C/L, the
ecm
expects some what of a delay in response to some of the fuel
corrections.
98% of what I've wound up doing is with the 13-44-45 flags disabled.
Or setting the C/L temp high.
$From: "Ron Gregory" <rgregory@chrysalis.org>
$Subject: ECM to start with..
$Date: Fri, 5 Feb 1999 08:30:14 -0600
I don't know if it's been decided yet (because I'm on
the digest version), but I think we ought to start with
the 1227749 ECM and say.... off the top of my head...
a Syclone bin <grin>
The Syclone bin has the same code as the 2.0 turbo
cars (sunbird, etc.)... only the tables are different.
The Syclone bin has provisions for boost, so if you
ever put a blower on your engine, the code will be
there to take care of it.
The Syclone bin is on a 27C128, and it's pretty full.
But the '749 was also used on the '88 Quad-4
cars... and that's a 27C256. We could take the
Syclone code/tables over to a larger PROM and
have plenty of room for expansion/improvement.
I already have quite a bit of documentation on
the tables and the theory behind the code. I
have run the bin through a disassember, but
haven't fully commented the code.
All we need to do is finish commenting the
code and begin to understand how the
code works. We could find/fix any bugs and
gain a good understanding of this Delco ECM
before we move on to one that we don't have
as much info on.
If I'm not mistaken, Bruce P. has run a Syclone
PROM on a '730, too, so the folks that can't
find a '749 ECM would still be able to test
an the more-common '730 ECM.
Just my humble opinion as a Syclone owner
I'm on the digest, so if you're going to priase/
flame me, please copy me personally, so I
don't have to wait all day to see what you think.
Thanks,
~~~~~~
Ron Gregory Syclone VIN #1452
rgregory@iname.com Garland, TX
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Mike Pitts:
The 7749 would be a *much* better candidate since it is
faster, uses a 68HC11 rather than a 6801, has a fast data
stream, is completely programmable (no embedded ROM), etc,
etc.
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Eric Aos:
looking at the 749, C0 at address 0009 seems to indicate 6
Cylinder, does anyone know the setting for 8 Cylinder?
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Ludis:
A dual bank 27C512 emulator
w/EPROM built with conventional RAM would require:
Each RAM bank needs to be a seperate 64KByte SRAM. Each SRAM's 16
address lines need to be muxed between the ECM or PIC. This will take
four "quad 2to1 muxes". The RAM control lines also need to be muxed, so
add a fifth mux. The ECM needs to be able to read (only) from either
bank, so add a pair of "quad 2to1 tristate muxes". The PIC needs to
read and write either bank, so add a pair of octal transceivers. Place
the EPROM on the ECM side of all this logic. Two D flip flops can
syncronize the bank switching, one for a bank select, the other being an
EPROM select. Clock the F/F's with the OR of the ~CS and ~OE signals
from the ECM. The tristate mux can be enabled by ORing Q of the EPROM
select F/F with (~CS OR ~OE). The EPROM can be selected similarly,
except using the notQ output. The bank select F/F's Q and notQ can
drive all the mux selector inputs.
The chip count is:
10 '157 muxes (remember, two banks!)
2 '257 muxes
2 '245 transceivers
1 '74 F/Fs
1 '32 OR gates
1 PIC microcontroller
1 MAX232 RS232 driver/receiver
Gee, this would be quite impressive, even when using SOP surface mount
parts! Perhaps there are some DRAM controllers that could replace the
sea of '157's.
FYI, the P4's ('165, '727, '730, '748, '749) wire the EPROM's ~CS input
to ground. The ~OE input is driven by the MPU. It is asserted for
reads in the upper 32K of memory. It is conditioned by an (MPU
internal) VMA, so location $FFFF will not be read during address
computation cycles. ~OE asserts in the middle of the E low time. It
deasserts upon the E high-to-low transition. Thus, ~OE is high for only
about 120nS between back to back PROM reads (with a 2^21 Hz E rate.)
--
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Bruce:
The 749 can do Peak+Hold for four injectors, in oem form.
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$From: "Terry/Carol Kelley" <terryk@foothill.net>
$Subject: Re: 749 inna 730
$Date: Wed, 31 Mar 1999 18:06:22 -0800
Hi Andy,
I loaded the 749 code into the upper 16k of the 32K eprom. It ran.
The 749 is a 16k eprom, the 7730 is a 32k prom. The 68HC11 processor expects
the restart vector (where do I start running code?) at FFFE and FFFF. So the
16k of code needs to be loaded in the upper 16k so the restart vector is in
the right place.
The 749 has KNUMCYL for the number of cylinders, but from the wiring
diagrams, it doesn't use Cylinder Select (this is the grounding or floating
of an ECM input line). Cylinder Select is a wiring pneumonic, and KNUMCYL is
a software pneumonic.
Terry Kelley
terryk@foothill.net
1986 Olds Ciera GT 3800 Supercharged
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$Date: Fri, 02 Apr 1999 02:38:58 -0800
$From: Ludis Langens <ludis@cruzers.com>
$Subject: 16045154 chip info
[ Some of you may see this twice, I sent it to the wrong list. ]
To solve a VSS problem, I just investigated the '45154 chip in a 1227727
ECM. This chip is used in the '7727, '7730, and '7749 ECMs. It is
_not_ used in the '7165, '7748, and '7808. Below is what I figured out
about this chip.
The '45154 is in a 28 pin PLCC package. The MPU communicates with it
over the SPI peripheral interface. It has both an input port and an
output port. It also multiplexes the two styles of VSS input. Here is
a partial pinout:
Pin 8 Input bit, to bit %00000001 of the SPI byte.
Pin 9 Output bit, from bit %10000000 of the SPI byte.
Pin 10 Output bit, from bit %01000000.
Pin 11 Output bit, from bit %00100000.
Pin 12 SPI clock (from MPU).
Pin 14 GND
Pin 15 SPI ~CS (from MPU).
Pin 16 ~LIMP, aka ~RESET.
Pin 21 SPI MOSI (from MPU).
Pin 22 Optical (aka digital) VSS input signal.
Pin 23 Magnetic (aka analog) VSS input signal.
Pin 26 Selected VSS signal (output).
Pin 27 SPI MISO (to MPU).
Pin 28 VCC
The input port bits are transferred to the SPI shift register on the
falling edge of pin 15. The SPI shift register is transferred to the
output port on the rising edge of pin 15. The SPI shifter is only 8
bits wide. If the MPU attempts multiple byte transfers without
releasing pin 15, the previous output byte will simple loop back into
the MPU.
If pin 16 is low, the output bits and VSS mux select will be forced to
0. Input bits can still be read via the SPI port though.
Bit %00010000 of the output byte selects between the two VSS sources.
When this bit is set, pin 22 is routed to pin 26. When clear, the
signal on pin 23 is divided by two - the result is output on pin 26.
Here is how the pins are connected in a '7727/'7730/'7749:
Pin 8 From Quad Driver U20 pin 1, ~FAULT.
Pin 9 To U24 ('64992, magnetic VSS interface) pin 10, DivisorA.
Pin 10 To U24 pin 9, DivisorB.
Pin 11 To U24 pin 8, DivisorC.
Pin 12 From U1 (MPU) pin 50.
Pin 15 From U1 pin 3, bit %10000000 of port $4002.
Pin 16 From U13 (I/O buffer) pin 20, ~LIMP.
Pin 21 From U1 pin 49.
Pin 22 From U13 pin 12, complement of ECM optical VSS input.
Pin 23 From U24 pin 5, magnetic VSS zero crossing.
Pin 26 To U2 (TPU) pin 43, VSS1 capture @ $3FC2/$3FE0.
Pin 27 To U1 pin 48.
The '64992 zero crossing output pulses whenever the magnetic VSS input
crosses zero volts. This essentially frequency doubles the VSS signal.
In magnetic VSS mode, the '45154 divides this back to the original
frequency. The signal it sends to the TPU may, or may not, be in phase
with the ECM's magnetic VSS input. The TPU "captures" this signal once
per cycle. In optical VSS mode, the U13's VSS output is sent to the
TPU. Because the I/O buffer inverts the signal, the TPU input will be
out of phase with the ECM's optical VSS input.
The '64992 outputs several digital VSS signals for use by cruise control
and the instrument cluster. It has two 2000 ppm and two 4000 ppm output
drivers. The '64992 can divide the VSS frequency before sending it to
these outputs. The Divisor[ABC] bits select the divisor. Note that the
ECM never sees this frequency division internally. Here are the divisors:
A B C
0 0 0 Divide by 1 (ie for a 4000 ppm VSS)
0 0 1 Divide by 9 (36000 ppm VSS)
0 1 0 Divide by 7 (28000 ppm VSS)
0 1 1 Divide by 11 (44000 ppm VSS)
1 0 0 Divide by 6 (24000 ppm VSS)
1 0 1 Divide by 10 (40000 ppm VSS)
1 1 0 Divide by 8 (32000 ppm VSS)
1 1 1 Divisor disabled, no output
--
Ludis Langens ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies: http://www.cruzers.com/~ludis/
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hello,
The boost gauge is in parallel with the ECM on the Sunbird. Uses the same
map signal on pin F15 of the 749. Had a wiring diagram faxed to me today.
Email me if any more info is needed.
John
gmman@eskimo.com
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$Date: Wed, 07 Apr 1999 05:28:43 -0800
$From: Ludis Langens <ludis@cruzers.com>
$Subject: EPROM Emulator Proposal
The EPROM emulator debate on this list seems to be going in circles.
Either people have short memories, or there are a lot of new members who
missed the discussion and decisions made in the first few weeks of
gmecm. Either way, please read through the archives.
Anyway, here is an emulator proposal based on the prior discussion. I
did some ruthless cutting of features and expandability (indicated with
a *). I propose the use of a single dual-port SRAM (from Cypress or
IDT) and a 40/44 pin PIC microcontroller to load this RAM. A battery
back up will keep the SRAM alive. This allows an ECM to boot from the
DPRAM immediately upon power-up. The whole emulator circuit board
should be small enough to fit inside a '165/'727/'730/'749/'808 ECM.
The DPRAM is split into two banks. The PIC can read and write in either
bank. It also controls which bank the ECM reads. This allows the ECM
to execute out of one bank while the PIC writes into the other bank.
Once a download is finished, the ECM can be switched instantly to the
new bank. A 64Kbyte DPRAM allows emulating up to a 27256 EPROM. A
128Kbyte DPRAM emulates a 27512.
128Kbyte DPRAMs are currently only available in an impossible to hand
solder 100 TQFP package. Smaller DPRAMs come in 84 PLCC packages. The
TQFP package is so much smaller than the PLCC that we can make a dual
pattern circuit board with the TQFP inside the PLCC. This allows most
people to use a PLCC DPRAM. Those few who need to emulate a 27512 could
have a circuit board company solder on a TQFP chip (*). Perhaps in half
a year a 128Kbyte DPRAM will also be available in PLCC.
This emulator will not emulate a 27C010 or any other 32 pin EPROM (*).
The PIC can communicate with a laptop computer using a MAX233. That's a
MAX232 without the external capacitors (this saves board space). The
PIC doesn't have enough I/O lines, so only TxD and RxD signals are
supported (*). If data handshaking is needed, it will have to be with
XON and XOFF characters.
To prevent the ECM from reading indeterminate data, the ECM side bank
select needs to be syncronized with ECM memory access. A latch
controlled by the OR of the ECM's ~CS and ~OE signals will suffice.
This can be built with six simple gates in two 14 pin chips. The OR
gate needs to be an HCT part.
An EPROM reader is included in this design. This allows reading out the
original EPROM/MEMCAL contents without a seperate EPROM programmer. The
EPROM can be accessed by the PIC. To allow 'hot socketing', the PIC can
shut off the EPROM's power. Note that the ECM _cannot_ read this EPROM.
A 66 pin plug (which plugs into a MEMCAL socket) connects the emulator
to an ECM. A 66 pin socket allows a MEMCAL to be piggy-backed onto the
emulator. All the non-EPROM MEMCAL pins are wired 1 to 1 between the
plug and socket. There should be enough room to also have 0.3"/0.6"
wide sockets for resistor packs and a ESC module removed from a MEMCAL.
Additionally, 0.6" 28 pin DIP socket patterns can straddle the EPROM
pins of both the 66 pin plug and socket. The former allows the emulator
to have a header for non-MEMCAL applications. The latter is for reading
a seperate EPROM.
The ECM's A0-A15, D0-D7, ~CS, and ~OE connect directly to one side of
the DPRAM. The address lines are shifted up by one so that the DPRAM A0
can be used for the bank select.
The PIC connects to the DPRAM and piggybacked EPROM/MEMCAL as follows:
RA0..RA1 A14..A15 (DPRAM A15..A16)
RA2 PIC RAM bank select (DPRAM A0)
RA3 ECM RAM bank select (ECM side DPRAM A0 via latch)
RA4 EPROM power control (active low) (RA4 is open-collector)
RA5 EPROM ~CS
RB0..RB7 A0..A7 (DPRAM A1..A8)
RC0..RC5 A8..A13 (DPRAM A9..A14)
RC6 TxD
RC7 RxD
RD0..RD7 D0-D7
RE0 ~OE (DPRAM & EPROM)
RE1 ~WE (DPRAM R/~W)
RE2 DPRAM ~CS
For the battery back-up feature, all the DPRAM inputs will need 100K (or
so) ohm pulldown resistors. The DPRAM has two chip select inputs on
each side. The second input can be controlled by the battery back-up
circuit. This circuit still needs to be designed. I don't have access
to the latest power controller chip data. I think someone had a
proposal for this. Note that the DPRAM needs to be fed 5 volts even
during standby mode. Also needed is a VCC switch for the EPROM. I
think a single FET would work.
This emulator is meant to emulate 28 pin EPROMs from the 2764 through
the 27512. A 24 pin to 28 pin adapter cable would allow emulation of
2732 EPROMs for the C3 folks.
Is there enough interest for me to draw up a schematic in a few days?
Someone else will need to draw up the power supply circuitry. Following
that, circuit board artwork will be needed (David?). If we decide to
proceed with this design, I should have time to write some code for the
PIC in a month or two. Right now my top priority is assembling an engine.
BTW, this is seperate from the RAMCAL idea I mentioned a while ago. I'm
ready to write some CPLD equations for that - once my engine is running.
--
Ludis Langens ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies: http://www.cruzers.com/~ludis/
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
Bruce Plecan wrote:
Starting in 87, the valve cover and the turbo to throttle body pipe are
a very bright red. You can recognize a '749 equipped Sunbird from ...
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The 749 will fire 4 P+H
Grumpy
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In the 165/727/730/748/749/808/etc., the A/D is a seperate industry
standard chip on the SPI bus. The upper four bits of the command byte
select one of 11 channels (or a 12th self test channel) for conversion.
There is also a 19 channel version of this chip which uses the upper
five bits for a mux select. Note that in the 727/730/749 GM uses a
seperate 8to1 analog mux feeding one of the 11 channels. (Why didn't
they just use the bigger A/D?)
The SPI bus is full duplex. Thus, at the same time as the command byte
is shifted out to the peripheral, a response byte is shifted in. An A/D
conversion takes two of these transfers. The first transmits the mux
select command (the received byte is ignored). The second transfer
receives the conversion result (and a null command is sent). Actually,
GM likes to send the self test command during the second transfer. This
means that at the next A/D operation, the first received byte will be
for the self test channel. This is sometimes checked and a code flagged.
Check the archives (diy_efi & gmecm) for a (partial) I/O map of the
165/727/730/748/749/808/etc. Also check the '748 schematic on my web
pages. The '748 is a reduced feature version of these other ECMs.
--
Ludis Langens ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies: http://www.cruzers.com/~ludis/
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0x0332 KAFOPT1_7 Manual Shift Logic (On) / Automatic TCC Logic (Off)
Off (stock syty)
0x0332 KAFOPT1_7 Manual Shift Logic (On) / Automatic TCC Logic (Off)
On (stock sunbird)
So with this bit Off - shift light code/tables not used, this bit On, TCC
logic/tables not used.
Brian Green
Syclone 160
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MAP1volts out = Vref(.01059*[Kpa] - .10941)
MAP2volts out = Vref (.00500*[Kpa] - .04000)
Walt.
I
out.
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No, Scot simply upgraded his 1227727 to a 16149396 by populating three
empty locations on the circuit board. The same sort of upgrade can be
done to a 1227730 and 1227749. This extra RAM appears at $1800 through $1FFF.
--
Ludis Langens ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies: http://www.cruzers.com/~ludis/
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$From: "Ron Gregory" <rgregory@chrysalis.org>
$Subject: ECM to start with..
$Date: Fri, 5 Feb 1999 08:30:14 -0600
I don't know if it's been decided yet (because I'm on
the digest version), but I think we ought to start with
the 1227749 ECM and say.... off the top of my head...
a Syclone bin <grin>
The Syclone bin has the same code as the 2.0 turbo
cars (sunbird, etc.)... only the tables are different.
The Syclone bin has provisions for boost, so if you
ever put a blower on your engine, the code will be
there to take care of it.
The Syclone bin is on a 27C128, and it's pretty full.
But the '749 was also used on the '88 Quad-4
cars... and that's a 27C256. We could take the
Syclone code/tables over to a larger PROM and
have plenty of room for expansion/improvement.
I already have quite a bit of documentation on
the tables and the theory behind the code. I
have run the bin through a disassember, but
haven't fully commented the code.
All we need to do is finish commenting the
code and begin to understand how the
code works. We could find/fix any bugs and
gain a good understanding of this Delco ECM
before we move on to one that we don't have
as much info on.
If I'm not mistaken, Bruce P. has run a Syclone
PROM on a '730, too, so the folks that can't
find a '749 ECM would still be able to test
an the more-common '730 ECM.
Just my humble opinion as a Syclone owner
I'm on the digest, so if you're going to priase/
flame me, please copy me personally, so I
don't have to wait all day to see what you think.
Thanks,
~~~~~~
Ron Gregory Syclone VIN #1452
rgregory@iname.com Garland, TX
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Here is the dwell computation code from the SyTy (and turbo Sunbird)
program. All the named locations are RAM variables except for
TachInterval which comes from the hardware timing chip. Notice that all
of the constants are hard coded, none are read from the configuration
area. (Question: Are the SyTy and Sunbird distributor or DIS?)
This code fragment is invoked at 80 Hz
xD035 ...
LDX TachInterval ;Hardware register
LDAA #255 ;Dummy huge ExtraDwell
LDAB Flags2F
BITB #bigMapIncrease
BNE @0 ;Force ExtraDwell := (TachInterval / 8)
LDD OldTachInterval ;OldTachInterval - TachInterval
PSHX
TSX
SUBD (X)
PULX
ASLD ;Double difference
SUBD ExtraDwell ;Extra dwell if RPM increased
BMI @1
ADDD ExtraDwell
@0 STD ExtraDwell
@1 PSHX ;TachInterval to D
PULD
LSRD ;TachInterval / 8
LSRD
LSRD
SUBD ExtraDwell ;Limit ExtraDwell to (TachInterval / 8)
BHS @2
ADDD ExtraDwell
STD ExtraDwell
@2 PSHX ;TachInterval to D
PULD
STD OldTachInterval ;Set new OldTachInterval
LSRD ;Compute Dwell using TachInterval
SUBD #229
BHS @3
ADDD #308
BRA @5
@3 LSRD
SUBD #295
BLO @4
ADDD #382
BRA @5
@4 ADDD #1527
LSRD
LSRD
@5 STD Dwell
LDAA #120 ;Increase dwell at low volts
DIFA SensedVolts
LDAB #4
MUL
ADDD Dwell ;Combine all terms
ADDD ExtraDwell
STD Dwell
LDD TachInterval ;TachInterval - 39
SUBD #39
SUBD Dwell ;Limit Dwell to (TachInterval - 39)
BHS @6
ADDD Dwell
STD Dwell
@6 ...
This code fragment slowly reduces ExtraDwell to zero. It is executed
once per ignition event (up to 80 Hz).
xCE2F ...
LDD ExtraDwell ;ExtraDwell / 8
LSRD
LSRD
LSRD
COMA ;- (ExtraDwell / 8) - 1
COMB
ADDD ExtraDwell ;ExtraDwell - (ExtraDwell / 8) - 1
BPL @9
CLRD
@9 STD ExtraDwell ;Decay ExtraDwell to zero
--
Ludis Langens ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies: http://www.cruzers.com/~ludis/
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$From: ECMnut@aol.com
$Date: Wed, 31 Mar 1999 10:00:44 EST
$Subject: WAS MAF History, now why not 749
Hi Andy,
When Richard Tomlinson wrote PromGrammer, his focus
(and test vehicle) was a 6 cyl Syclone turbo. If you use a
hex editor to change the byte, it will then display as 8 cyl
in the program. True, you cannot edit that byte from within
PromGrammer. Using a hex editor, change the "C0" at location
0x00009 to "00" for eight cylinder.
As for 1 bar vs 2 bar, I forget the actual value. Refer to the 749 Docs
for that. Per promgrammer, the location and name info are:
~~~~~~ snip ~~~~~~
0x0334 KAFOPT3_5 2 ATM MAP Option
~~~~~ end snip ~~~~
The Syclone & Sunbird Turbo chips will have the same value there.
If you are afraid to be a "pioneer" on this, someone else will prolly
do something similar in the near future. You can bet the fuel related
tables will need significant work after changing the MAP option byte
from 2 to 1 BAR.
HTH- MV
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TK wrote:
The SyTy / Turbo Sunbird code appears to be derived from the Fiero
6869/7170 speed-density code. I haven't looked at the SyTy code all
that much, but every part I have looked at is almost a line-by-line copy
of the Fiero code.
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
Also, every 4 cyl Sunbird I've ever seen used HEI.
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$From: ECMnut@aol.com
$Date: Mon, 29 Nov 1999 10:55:26 EST
$Subject: Re: 165 MAF and 808 MAP - differences for turbo apps?
Hi Pat,
Sorry, stepped in late, but 87-90 Turbo Sunbird 2.0L 4cyl is
VERY similar to syty 91-93 4.3L 6cyl. Same offsets in chip too.
Can set byte for 3,4,6 or 8 cylinders. Is 2 bar MAP from factory,
but can be upgraded to 3 bar with help from gurus on Syty list.
Mike V
91 Syclone
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$From: "Bruce Plecan" <nacelp@bright.net>
$Subject: Re: Sunbird wiring
$Date: Wed, 1 Dec 1999 04:30:12 -0500
----- Original Message -----
From: <cwagner@info2000.net>
To: <gmecm@efi332.eng.ohio-state.edu>; <diy_efi@efi332.eng.ohio-state.edu>
Sent: Wednesday, December 01, 1999 12:19 AM
Subject: Sunbird wiring
For wiring try the FTP
For a hac go to syty@syty.org and get promgrammer
Grumpy
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$From: "Scott Flanagan" <flanaj@mindspring.com>
$Subject: 1227749 EEPROM Type
$Date: Thu, 2 Dec 1999 23:00:19 -0500
While at the junkyard the other day I luckily came accross two '88 Pointiac
Grand Am Quad 4's. They have the 1227749 with the uncommon Integrated
Direct Ignition. I am trying to work with an old reader, but I am not too
sure what type of chip it is, or if it is too odd to read. The chip in one
of the ECU's has the number 27C256 on it, that is an original chip, which
does not have a window for erasing. My reader says it can read an I27256
but it can't read it at all. The other ECU is a remanufactured one, the
chip does not have any numbers on it that are useful, but it does have a
window for erasing things, my burner can read it but the information is
garbled. When loaded into Promgrammer it has some wacky values such as 0
cylinders, etc. Also, this is probably a dumb question but do you have to
unsolder the chip from the long brown carrier? Right now I have an adapter
that I made that connects the brown carrier to the reader. Thanks, I am
very excited that I could finally find these ECU's and complete harnesses.
-Scott Flanagan
'80 Fiat Spider (Awaiting new FI and Turbo)
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
Date: Thu, 15 Sep 1994 04:39:31 -0400
Reply-to: imagecft@netcom.com
From: imagecft@netcom.com (Richard Man)
To: Multiple recipients of list <robot-board@oberon.com>
Subject: (Commercial) HC11 C Compiler
Version 1.02 of the compiler is ready. Also note that there is now a
mailing
list for discussing icc11 and general HC11 programming issues.
// richard
====
**** Professional HC11 Tools At a Budget Price! ****
The ImageCraft HC11 C Compiler, ICC11, version 1.0
ICC11 is a high quality yet low cost compiler package that runs on
DOS and
OS2 environments. Included in the package are:
. A comprehensive 90 page manual.
. A fast near-ANSI C (*) conformant compiler with built-in peephole
optimizer.
. Quality code generation. Code size is typically only 5% to 20%
larger than
expensive ($500 to $1200) compilers.
. Assembler, linker, and librarian.
. Standard C header files and library functions.
. HC11 specific support such as embedded assembly, pragma for
declaring
interrupt functions, etc.
. Calling conventions compatible with other compilers.
. Both 16 bit and 32 bit executables.
. Technical support over the Internet, including a mailing list for
discussions and product update information.
. MIT Interactive C compatible multitasking kernel library.
. Miniboard library.
, Coming soon! Add-on low priced multitasking executive with
subsumption
architecture semantics.
Price: $39.95, plus $3.95 shipping and handling within the U.S., $5.00
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Canada and $10.00 overseas. CA residents please add 8 1/4% sales
tax.
To order, please send a check or money order (international orders
may use a
"postal" check in U.S. dollars) to:
ImageCraft
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Sunnyvale, CA 94088-4226
(408) 749-0702
Please direct email inquires to: imagecft@netcom.com. To join the
mailing list,
send the message "subscribe icc11-list" to listserv@netcom.com.
----
(*) The following ANSI C features are not yet supported, but most are
expected
to be released at some future date:
. Long data type is only 2 bytes, although limited 32 bit support is
provided
through typedef and library calls.
. The compiler does not yet support floating point code generation.
. A not quite full set of C library functions is supplied, but most of the
missing functions are not applicable to embedded applications.
. The preprocessor does not support trigraphs, and it only uses K & R
macro
rescanning rules.
**** End ICC11 Announcement ****
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
I'd highly recommend
the Hugh McInnes book TURBOCHARGING-
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Electronic boost control can be established really cheap by getting a wastegate
modulator valve off a '86-'87 Buick GN. It takes a variable pulse width and
an input pressure line from the manifold and outputs a variable pressure based
on the pulse width. Feed this pressure back into a conventional screw-type
wastegate, and you have the control you seek. The '91-'92-'93 Syclone/Typhoon
also uses this, as does some of the Sunbird turbos I think.
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
'87-'90 2.0 liter Turbo cars [VIN engine code "M"]
Sunbird, Skyhawk, Calais, Grand Am, Skylark
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$From: peter paul fenske <pfenske@direct.ca>
$Subject: Re: Turbo Sunbird
$Date: Wed, 31 Dec 1997 12:46:58 -0800
Hi Mike
Depends on flavor.
If it is a C3 ecm, two ecm connectors, the chip is enclosed
in a black plastic holder and is a 27C32 at least it can
be read this way..
If it is in the Big blue package with the 60 pin connector
It is a 27C128. Sometimes they are 27C256s also
You need to make a cheapy adapter to read the package.
Just so the eprom plugs into the adapter
For the C3 invoke you checksum function from 0002 to 0FFF
The bytes should be the same as 0000,0001
For the P4 big blue invoke the checksum function in your
programmer from 0008 to 3FFF for the 16 k and
0008 to 7FFF for the 32 K
The bytes should be the same as 0006,0007
tnx again Peter
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$Date: Wed, 31 Dec 1997 12:19:06 -0800
$From: Carl Summers <InnovativeTechnologies@worldnet.att.net>
$Subject: Re: Turbo Sunbird
Michael J Weber wrote:
Should be a 27c256.....
-Carl Summers
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$Date: Fri, 02 Jan 1998 08:10:27 -0600
$From: "John A. Hess" <johnhess@cris.com>
$Subject: Re: Turbo Sunbird
The "special" adapter is not all that complicated. Just get yourself a PC board
IDE header,. cut it to the number of pins that the EPROM actually uses (28), and
spread the pins to fit your EPROM ZIF socket. Works fine and lasts a long time.
H8carbs wrote:
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$From: ECMnut@aol.com
$Date: Thu, 5 Feb 1998 12:53:31 EST
$Subject: Re: AN Fittings
Bruce,
sorry, that was supposed to go to Peter.
I was trying to remember the name of the meeeen motor
cycle gang in the old Beach-Blanket-Bingo movie.
Enjoyed the part-throttle cruising notes..
Have you checked out the Sunbird doc yet?
All of the parameters in the Sunbird Turbo chip
line up perfectly with the SyTy chip. Did I send
you the address dump from PronGrammer?
It lists all the addressses down the left hand side...
Mike V.
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$From: ECMnut@aol.com
$Date: Fri, 13 Feb 1998 15:43:10 EST
$Subject: Re: GM 1227148 ECM Question
In a message dated 98-02-13 13:31:31 EST, you write:
<< Why wouldn't you want to use a 1227749, that was used
with the 4's..
Uhh... I'm not sure how make it work with a distrbutorless engine.
The Turbo Sunbird & Syphoons had distributor caps & one coil.
I'm not sure about the quad-4s that used that ECM...
If thet were distributorless, I better ake a closer look.
I think many Quad 4s used something other than the 749...
Thanks
I'm always trying to get out of any work!
Mike V
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1227749 bits extracted from the archives:
1227730 w/ one missing quad driver, 1 additional inkector driver FET
1987-1990 2.0 OHC L4 PFI Turbo "M" LT3
Memcals: afdz, albk
Eprom: 27C128 or 27C256
--------------
Date: Sat, 13 May 2000 00:17:23 EDT
From: ECMnut@aol.com
Subject: Re: ALDL Reported BPW
> Does "BPW" mean the *base* pulse width before all the corrections are
> multiplied in? IOW, does it just depend on the injector constant? The
> readings might make more sense then, but then the readings wouldn't
change
> w/ changing inputs to the ECU that affect PW....???
>
Whadaya mean? We established that the 749 turbo code's
injector constant value is little more than a decoration.
I know there are other variables, but I was able to
impact PW from a these tables.
All 3 of these play directly into the final pulse width, and
return a value (via table lookup) in response to
to an ECM inputs (map, rpm, or both):
1) F29_TABLE Base Pulse VE vs RPM And MAP Table
("+10 to 15" in the high MAP regions did alot)
2) F30_TABLE Base Pulse VE vs RPM Table (slight impact)
3) F61_TABLE PE AF Ratio vs NTRPMX Table (slight impact)
I gotta get a decent scope. You're havin too much fun over there.
MV Still lean.. I think my Walbro pump is dying after approx 2k miles
- -----------------------------------------------------------------
-----------
Date: Sat, 19 Aug 2000 22:18:56 -0400
From: Shannen Durphey <shannen@grolen.com>
Subject: Re: '749 questions
EST is ecm output to module. This is the ecm generated spark signal.
REF is the square wave input to the ecm from the module. It's an RPM
signal.
Bypass allows the ecm to toggle the module between using and ignoring
EST. If there is no voltage on Bypass, the module will fire the coil
based on the pickup coil pulses. This is also the line to disconnect
to set base timing on a real engine.
Crank input is REF, no other needed, signal provided by the module in
both dizzy and DIS systems.
VSS inputs... The VSS has 2 output wires. It's an a/c signal, the ecm
is connected to both wires. Any signal buffering is internal to the
ecm.
Be sure to connect the REF LOW (black w/red tracer) between the module
and ecm.
Shannen
Just remember about if / when you starting trying to work with C/L, the
ecm
expects some what of a delay in response to some of the fuel
corrections.
98% of what I've wound up doing is with the 13-44-45 flags disabled.
Or setting the C/L temp high.
$From: "Ron Gregory" <rgregory@chrysalis.org>
$Subject: ECM to start with..
$Date: Fri, 5 Feb 1999 08:30:14 -0600
I don't know if it's been decided yet (because I'm on
the digest version), but I think we ought to start with
the 1227749 ECM and say.... off the top of my head...
a Syclone bin <grin>
The Syclone bin has the same code as the 2.0 turbo
cars (sunbird, etc.)... only the tables are different.
The Syclone bin has provisions for boost, so if you
ever put a blower on your engine, the code will be
there to take care of it.
The Syclone bin is on a 27C128, and it's pretty full.
But the '749 was also used on the '88 Quad-4
cars... and that's a 27C256. We could take the
Syclone code/tables over to a larger PROM and
have plenty of room for expansion/improvement.
I already have quite a bit of documentation on
the tables and the theory behind the code. I
have run the bin through a disassember, but
haven't fully commented the code.
All we need to do is finish commenting the
code and begin to understand how the
code works. We could find/fix any bugs and
gain a good understanding of this Delco ECM
before we move on to one that we don't have
as much info on.
If I'm not mistaken, Bruce P. has run a Syclone
PROM on a '730, too, so the folks that can't
find a '749 ECM would still be able to test
an the more-common '730 ECM.
Just my humble opinion as a Syclone owner
I'm on the digest, so if you're going to priase/
flame me, please copy me personally, so I
don't have to wait all day to see what you think.
Thanks,
~~~~~~
Ron Gregory Syclone VIN #1452
rgregory@iname.com Garland, TX
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Mike Pitts:
The 7749 would be a *much* better candidate since it is
faster, uses a 68HC11 rather than a 6801, has a fast data
stream, is completely programmable (no embedded ROM), etc,
etc.
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Eric Aos:
looking at the 749, C0 at address 0009 seems to indicate 6
Cylinder, does anyone know the setting for 8 Cylinder?
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Ludis:
A dual bank 27C512 emulator
w/EPROM built with conventional RAM would require:
Each RAM bank needs to be a seperate 64KByte SRAM. Each SRAM's 16
address lines need to be muxed between the ECM or PIC. This will take
four "quad 2to1 muxes". The RAM control lines also need to be muxed, so
add a fifth mux. The ECM needs to be able to read (only) from either
bank, so add a pair of "quad 2to1 tristate muxes". The PIC needs to
read and write either bank, so add a pair of octal transceivers. Place
the EPROM on the ECM side of all this logic. Two D flip flops can
syncronize the bank switching, one for a bank select, the other being an
EPROM select. Clock the F/F's with the OR of the ~CS and ~OE signals
from the ECM. The tristate mux can be enabled by ORing Q of the EPROM
select F/F with (~CS OR ~OE). The EPROM can be selected similarly,
except using the notQ output. The bank select F/F's Q and notQ can
drive all the mux selector inputs.
The chip count is:
10 '157 muxes (remember, two banks!)
2 '257 muxes
2 '245 transceivers
1 '74 F/Fs
1 '32 OR gates
1 PIC microcontroller
1 MAX232 RS232 driver/receiver
Gee, this would be quite impressive, even when using SOP surface mount
parts! Perhaps there are some DRAM controllers that could replace the
sea of '157's.
FYI, the P4's ('165, '727, '730, '748, '749) wire the EPROM's ~CS input
to ground. The ~OE input is driven by the MPU. It is asserted for
reads in the upper 32K of memory. It is conditioned by an (MPU
internal) VMA, so location $FFFF will not be read during address
computation cycles. ~OE asserts in the middle of the E low time. It
deasserts upon the E high-to-low transition. Thus, ~OE is high for only
about 120nS between back to back PROM reads (with a 2^21 Hz E rate.)
--
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Bruce:
The 749 can do Peak+Hold for four injectors, in oem form.
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$From: "Terry/Carol Kelley" <terryk@foothill.net>
$Subject: Re: 749 inna 730
$Date: Wed, 31 Mar 1999 18:06:22 -0800
Hi Andy,
I loaded the 749 code into the upper 16k of the 32K eprom. It ran.
The 749 is a 16k eprom, the 7730 is a 32k prom. The 68HC11 processor expects
the restart vector (where do I start running code?) at FFFE and FFFF. So the
16k of code needs to be loaded in the upper 16k so the restart vector is in
the right place.
The 749 has KNUMCYL for the number of cylinders, but from the wiring
diagrams, it doesn't use Cylinder Select (this is the grounding or floating
of an ECM input line). Cylinder Select is a wiring pneumonic, and KNUMCYL is
a software pneumonic.
Terry Kelley
terryk@foothill.net
1986 Olds Ciera GT 3800 Supercharged
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$Date: Fri, 02 Apr 1999 02:38:58 -0800
$From: Ludis Langens <ludis@cruzers.com>
$Subject: 16045154 chip info
[ Some of you may see this twice, I sent it to the wrong list. ]
To solve a VSS problem, I just investigated the '45154 chip in a 1227727
ECM. This chip is used in the '7727, '7730, and '7749 ECMs. It is
_not_ used in the '7165, '7748, and '7808. Below is what I figured out
about this chip.
The '45154 is in a 28 pin PLCC package. The MPU communicates with it
over the SPI peripheral interface. It has both an input port and an
output port. It also multiplexes the two styles of VSS input. Here is
a partial pinout:
Pin 8 Input bit, to bit %00000001 of the SPI byte.
Pin 9 Output bit, from bit %10000000 of the SPI byte.
Pin 10 Output bit, from bit %01000000.
Pin 11 Output bit, from bit %00100000.
Pin 12 SPI clock (from MPU).
Pin 14 GND
Pin 15 SPI ~CS (from MPU).
Pin 16 ~LIMP, aka ~RESET.
Pin 21 SPI MOSI (from MPU).
Pin 22 Optical (aka digital) VSS input signal.
Pin 23 Magnetic (aka analog) VSS input signal.
Pin 26 Selected VSS signal (output).
Pin 27 SPI MISO (to MPU).
Pin 28 VCC
The input port bits are transferred to the SPI shift register on the
falling edge of pin 15. The SPI shift register is transferred to the
output port on the rising edge of pin 15. The SPI shifter is only 8
bits wide. If the MPU attempts multiple byte transfers without
releasing pin 15, the previous output byte will simple loop back into
the MPU.
If pin 16 is low, the output bits and VSS mux select will be forced to
0. Input bits can still be read via the SPI port though.
Bit %00010000 of the output byte selects between the two VSS sources.
When this bit is set, pin 22 is routed to pin 26. When clear, the
signal on pin 23 is divided by two - the result is output on pin 26.
Here is how the pins are connected in a '7727/'7730/'7749:
Pin 8 From Quad Driver U20 pin 1, ~FAULT.
Pin 9 To U24 ('64992, magnetic VSS interface) pin 10, DivisorA.
Pin 10 To U24 pin 9, DivisorB.
Pin 11 To U24 pin 8, DivisorC.
Pin 12 From U1 (MPU) pin 50.
Pin 15 From U1 pin 3, bit %10000000 of port $4002.
Pin 16 From U13 (I/O buffer) pin 20, ~LIMP.
Pin 21 From U1 pin 49.
Pin 22 From U13 pin 12, complement of ECM optical VSS input.
Pin 23 From U24 pin 5, magnetic VSS zero crossing.
Pin 26 To U2 (TPU) pin 43, VSS1 capture @ $3FC2/$3FE0.
Pin 27 To U1 pin 48.
The '64992 zero crossing output pulses whenever the magnetic VSS input
crosses zero volts. This essentially frequency doubles the VSS signal.
In magnetic VSS mode, the '45154 divides this back to the original
frequency. The signal it sends to the TPU may, or may not, be in phase
with the ECM's magnetic VSS input. The TPU "captures" this signal once
per cycle. In optical VSS mode, the U13's VSS output is sent to the
TPU. Because the I/O buffer inverts the signal, the TPU input will be
out of phase with the ECM's optical VSS input.
The '64992 outputs several digital VSS signals for use by cruise control
and the instrument cluster. It has two 2000 ppm and two 4000 ppm output
drivers. The '64992 can divide the VSS frequency before sending it to
these outputs. The Divisor[ABC] bits select the divisor. Note that the
ECM never sees this frequency division internally. Here are the divisors:
A B C
0 0 0 Divide by 1 (ie for a 4000 ppm VSS)
0 0 1 Divide by 9 (36000 ppm VSS)
0 1 0 Divide by 7 (28000 ppm VSS)
0 1 1 Divide by 11 (44000 ppm VSS)
1 0 0 Divide by 6 (24000 ppm VSS)
1 0 1 Divide by 10 (40000 ppm VSS)
1 1 0 Divide by 8 (32000 ppm VSS)
1 1 1 Divisor disabled, no output
--
Ludis Langens ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies: http://www.cruzers.com/~ludis/
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hello,
The boost gauge is in parallel with the ECM on the Sunbird. Uses the same
map signal on pin F15 of the 749. Had a wiring diagram faxed to me today.
Email me if any more info is needed.
John
gmman@eskimo.com
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$Date: Wed, 07 Apr 1999 05:28:43 -0800
$From: Ludis Langens <ludis@cruzers.com>
$Subject: EPROM Emulator Proposal
The EPROM emulator debate on this list seems to be going in circles.
Either people have short memories, or there are a lot of new members who
missed the discussion and decisions made in the first few weeks of
gmecm. Either way, please read through the archives.
Anyway, here is an emulator proposal based on the prior discussion. I
did some ruthless cutting of features and expandability (indicated with
a *). I propose the use of a single dual-port SRAM (from Cypress or
IDT) and a 40/44 pin PIC microcontroller to load this RAM. A battery
back up will keep the SRAM alive. This allows an ECM to boot from the
DPRAM immediately upon power-up. The whole emulator circuit board
should be small enough to fit inside a '165/'727/'730/'749/'808 ECM.
The DPRAM is split into two banks. The PIC can read and write in either
bank. It also controls which bank the ECM reads. This allows the ECM
to execute out of one bank while the PIC writes into the other bank.
Once a download is finished, the ECM can be switched instantly to the
new bank. A 64Kbyte DPRAM allows emulating up to a 27256 EPROM. A
128Kbyte DPRAM emulates a 27512.
128Kbyte DPRAMs are currently only available in an impossible to hand
solder 100 TQFP package. Smaller DPRAMs come in 84 PLCC packages. The
TQFP package is so much smaller than the PLCC that we can make a dual
pattern circuit board with the TQFP inside the PLCC. This allows most
people to use a PLCC DPRAM. Those few who need to emulate a 27512 could
have a circuit board company solder on a TQFP chip (*). Perhaps in half
a year a 128Kbyte DPRAM will also be available in PLCC.
This emulator will not emulate a 27C010 or any other 32 pin EPROM (*).
The PIC can communicate with a laptop computer using a MAX233. That's a
MAX232 without the external capacitors (this saves board space). The
PIC doesn't have enough I/O lines, so only TxD and RxD signals are
supported (*). If data handshaking is needed, it will have to be with
XON and XOFF characters.
To prevent the ECM from reading indeterminate data, the ECM side bank
select needs to be syncronized with ECM memory access. A latch
controlled by the OR of the ECM's ~CS and ~OE signals will suffice.
This can be built with six simple gates in two 14 pin chips. The OR
gate needs to be an HCT part.
An EPROM reader is included in this design. This allows reading out the
original EPROM/MEMCAL contents without a seperate EPROM programmer. The
EPROM can be accessed by the PIC. To allow 'hot socketing', the PIC can
shut off the EPROM's power. Note that the ECM _cannot_ read this EPROM.
A 66 pin plug (which plugs into a MEMCAL socket) connects the emulator
to an ECM. A 66 pin socket allows a MEMCAL to be piggy-backed onto the
emulator. All the non-EPROM MEMCAL pins are wired 1 to 1 between the
plug and socket. There should be enough room to also have 0.3"/0.6"
wide sockets for resistor packs and a ESC module removed from a MEMCAL.
Additionally, 0.6" 28 pin DIP socket patterns can straddle the EPROM
pins of both the 66 pin plug and socket. The former allows the emulator
to have a header for non-MEMCAL applications. The latter is for reading
a seperate EPROM.
The ECM's A0-A15, D0-D7, ~CS, and ~OE connect directly to one side of
the DPRAM. The address lines are shifted up by one so that the DPRAM A0
can be used for the bank select.
The PIC connects to the DPRAM and piggybacked EPROM/MEMCAL as follows:
RA0..RA1 A14..A15 (DPRAM A15..A16)
RA2 PIC RAM bank select (DPRAM A0)
RA3 ECM RAM bank select (ECM side DPRAM A0 via latch)
RA4 EPROM power control (active low) (RA4 is open-collector)
RA5 EPROM ~CS
RB0..RB7 A0..A7 (DPRAM A1..A8)
RC0..RC5 A8..A13 (DPRAM A9..A14)
RC6 TxD
RC7 RxD
RD0..RD7 D0-D7
RE0 ~OE (DPRAM & EPROM)
RE1 ~WE (DPRAM R/~W)
RE2 DPRAM ~CS
For the battery back-up feature, all the DPRAM inputs will need 100K (or
so) ohm pulldown resistors. The DPRAM has two chip select inputs on
each side. The second input can be controlled by the battery back-up
circuit. This circuit still needs to be designed. I don't have access
to the latest power controller chip data. I think someone had a
proposal for this. Note that the DPRAM needs to be fed 5 volts even
during standby mode. Also needed is a VCC switch for the EPROM. I
think a single FET would work.
This emulator is meant to emulate 28 pin EPROMs from the 2764 through
the 27512. A 24 pin to 28 pin adapter cable would allow emulation of
2732 EPROMs for the C3 folks.
Is there enough interest for me to draw up a schematic in a few days?
Someone else will need to draw up the power supply circuitry. Following
that, circuit board artwork will be needed (David?). If we decide to
proceed with this design, I should have time to write some code for the
PIC in a month or two. Right now my top priority is assembling an engine.
BTW, this is seperate from the RAMCAL idea I mentioned a while ago. I'm
ready to write some CPLD equations for that - once my engine is running.
--
Ludis Langens ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies: http://www.cruzers.com/~ludis/
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Bruce Plecan wrote:
Starting in 87, the valve cover and the turbo to throttle body pipe are
a very bright red. You can recognize a '749 equipped Sunbird from ...
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The 749 will fire 4 P+H
Grumpy
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In the 165/727/730/748/749/808/etc., the A/D is a seperate industry
standard chip on the SPI bus. The upper four bits of the command byte
select one of 11 channels (or a 12th self test channel) for conversion.
There is also a 19 channel version of this chip which uses the upper
five bits for a mux select. Note that in the 727/730/749 GM uses a
seperate 8to1 analog mux feeding one of the 11 channels. (Why didn't
they just use the bigger A/D?)
The SPI bus is full duplex. Thus, at the same time as the command byte
is shifted out to the peripheral, a response byte is shifted in. An A/D
conversion takes two of these transfers. The first transmits the mux
select command (the received byte is ignored). The second transfer
receives the conversion result (and a null command is sent). Actually,
GM likes to send the self test command during the second transfer. This
means that at the next A/D operation, the first received byte will be
for the self test channel. This is sometimes checked and a code flagged.
Check the archives (diy_efi & gmecm) for a (partial) I/O map of the
165/727/730/748/749/808/etc. Also check the '748 schematic on my web
pages. The '748 is a reduced feature version of these other ECMs.
--
Ludis Langens ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies: http://www.cruzers.com/~ludis/
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0x0332 KAFOPT1_7 Manual Shift Logic (On) / Automatic TCC Logic (Off)
Off (stock syty)
0x0332 KAFOPT1_7 Manual Shift Logic (On) / Automatic TCC Logic (Off)
On (stock sunbird)
So with this bit Off - shift light code/tables not used, this bit On, TCC
logic/tables not used.
Brian Green
Syclone 160
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MAP1volts out = Vref(.01059*[Kpa] - .10941)
MAP2volts out = Vref (.00500*[Kpa] - .04000)
Walt.
I
out.
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No, Scot simply upgraded his 1227727 to a 16149396 by populating three
empty locations on the circuit board. The same sort of upgrade can be
done to a 1227730 and 1227749. This extra RAM appears at $1800 through $1FFF.
--
Ludis Langens ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies: http://www.cruzers.com/~ludis/
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$From: "Ron Gregory" <rgregory@chrysalis.org>
$Subject: ECM to start with..
$Date: Fri, 5 Feb 1999 08:30:14 -0600
I don't know if it's been decided yet (because I'm on
the digest version), but I think we ought to start with
the 1227749 ECM and say.... off the top of my head...
a Syclone bin <grin>
The Syclone bin has the same code as the 2.0 turbo
cars (sunbird, etc.)... only the tables are different.
The Syclone bin has provisions for boost, so if you
ever put a blower on your engine, the code will be
there to take care of it.
The Syclone bin is on a 27C128, and it's pretty full.
But the '749 was also used on the '88 Quad-4
cars... and that's a 27C256. We could take the
Syclone code/tables over to a larger PROM and
have plenty of room for expansion/improvement.
I already have quite a bit of documentation on
the tables and the theory behind the code. I
have run the bin through a disassember, but
haven't fully commented the code.
All we need to do is finish commenting the
code and begin to understand how the
code works. We could find/fix any bugs and
gain a good understanding of this Delco ECM
before we move on to one that we don't have
as much info on.
If I'm not mistaken, Bruce P. has run a Syclone
PROM on a '730, too, so the folks that can't
find a '749 ECM would still be able to test
an the more-common '730 ECM.
Just my humble opinion as a Syclone owner
I'm on the digest, so if you're going to priase/
flame me, please copy me personally, so I
don't have to wait all day to see what you think.
Thanks,
~~~~~~
Ron Gregory Syclone VIN #1452
rgregory@iname.com Garland, TX
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Here is the dwell computation code from the SyTy (and turbo Sunbird)
program. All the named locations are RAM variables except for
TachInterval which comes from the hardware timing chip. Notice that all
of the constants are hard coded, none are read from the configuration
area. (Question: Are the SyTy and Sunbird distributor or DIS?)
This code fragment is invoked at 80 Hz
xD035 ...
LDX TachInterval ;Hardware register
LDAA #255 ;Dummy huge ExtraDwell
LDAB Flags2F
BITB #bigMapIncrease
BNE @0 ;Force ExtraDwell := (TachInterval / 8)
LDD OldTachInterval ;OldTachInterval - TachInterval
PSHX
TSX
SUBD (X)
PULX
ASLD ;Double difference
SUBD ExtraDwell ;Extra dwell if RPM increased
BMI @1
ADDD ExtraDwell
@0 STD ExtraDwell
@1 PSHX ;TachInterval to D
PULD
LSRD ;TachInterval / 8
LSRD
LSRD
SUBD ExtraDwell ;Limit ExtraDwell to (TachInterval / 8)
BHS @2
ADDD ExtraDwell
STD ExtraDwell
@2 PSHX ;TachInterval to D
PULD
STD OldTachInterval ;Set new OldTachInterval
LSRD ;Compute Dwell using TachInterval
SUBD #229
BHS @3
ADDD #308
BRA @5
@3 LSRD
SUBD #295
BLO @4
ADDD #382
BRA @5
@4 ADDD #1527
LSRD
LSRD
@5 STD Dwell
LDAA #120 ;Increase dwell at low volts
DIFA SensedVolts
LDAB #4
MUL
ADDD Dwell ;Combine all terms
ADDD ExtraDwell
STD Dwell
LDD TachInterval ;TachInterval - 39
SUBD #39
SUBD Dwell ;Limit Dwell to (TachInterval - 39)
BHS @6
ADDD Dwell
STD Dwell
@6 ...
This code fragment slowly reduces ExtraDwell to zero. It is executed
once per ignition event (up to 80 Hz).
xCE2F ...
LDD ExtraDwell ;ExtraDwell / 8
LSRD
LSRD
LSRD
COMA ;- (ExtraDwell / 8) - 1
COMB
ADDD ExtraDwell ;ExtraDwell - (ExtraDwell / 8) - 1
BPL @9
CLRD
@9 STD ExtraDwell ;Decay ExtraDwell to zero
--
Ludis Langens ludis (at) cruzers (dot) com
Mac, Fiero, & engine controller goodies: http://www.cruzers.com/~ludis/
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$From: ECMnut@aol.com
$Date: Wed, 31 Mar 1999 10:00:44 EST
$Subject: WAS MAF History, now why not 749
Hi Andy,
When Richard Tomlinson wrote PromGrammer, his focus
(and test vehicle) was a 6 cyl Syclone turbo. If you use a
hex editor to change the byte, it will then display as 8 cyl
in the program. True, you cannot edit that byte from within
PromGrammer. Using a hex editor, change the "C0" at location
0x00009 to "00" for eight cylinder.
As for 1 bar vs 2 bar, I forget the actual value. Refer to the 749 Docs
for that. Per promgrammer, the location and name info are:
~~~~~~ snip ~~~~~~
0x0334 KAFOPT3_5 2 ATM MAP Option
~~~~~ end snip ~~~~
The Syclone & Sunbird Turbo chips will have the same value there.
If you are afraid to be a "pioneer" on this, someone else will prolly
do something similar in the near future. You can bet the fuel related
tables will need significant work after changing the MAP option byte
from 2 to 1 BAR.
HTH- MV
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TK wrote:
The SyTy / Turbo Sunbird code appears to be derived from the Fiero
6869/7170 speed-density code. I haven't looked at the SyTy code all
that much, but every part I have looked at is almost a line-by-line copy
of the Fiero code.
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
Also, every 4 cyl Sunbird I've ever seen used HEI.
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$From: ECMnut@aol.com
$Date: Mon, 29 Nov 1999 10:55:26 EST
$Subject: Re: 165 MAF and 808 MAP - differences for turbo apps?
Hi Pat,
Sorry, stepped in late, but 87-90 Turbo Sunbird 2.0L 4cyl is
VERY similar to syty 91-93 4.3L 6cyl. Same offsets in chip too.
Can set byte for 3,4,6 or 8 cylinders. Is 2 bar MAP from factory,
but can be upgraded to 3 bar with help from gurus on Syty list.
Mike V
91 Syclone
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-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$From: "Bruce Plecan" <nacelp@bright.net>
$Subject: Re: Sunbird wiring
$Date: Wed, 1 Dec 1999 04:30:12 -0500
----- Original Message -----
From: <cwagner@info2000.net>
To: <gmecm@efi332.eng.ohio-state.edu>; <diy_efi@efi332.eng.ohio-state.edu>
Sent: Wednesday, December 01, 1999 12:19 AM
Subject: Sunbird wiring
For wiring try the FTP
For a hac go to syty@syty.org and get promgrammer
Grumpy
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-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$From: "Scott Flanagan" <flanaj@mindspring.com>
$Subject: 1227749 EEPROM Type
$Date: Thu, 2 Dec 1999 23:00:19 -0500
While at the junkyard the other day I luckily came accross two '88 Pointiac
Grand Am Quad 4's. They have the 1227749 with the uncommon Integrated
Direct Ignition. I am trying to work with an old reader, but I am not too
sure what type of chip it is, or if it is too odd to read. The chip in one
of the ECU's has the number 27C256 on it, that is an original chip, which
does not have a window for erasing. My reader says it can read an I27256
but it can't read it at all. The other ECU is a remanufactured one, the
chip does not have any numbers on it that are useful, but it does have a
window for erasing things, my burner can read it but the information is
garbled. When loaded into Promgrammer it has some wacky values such as 0
cylinders, etc. Also, this is probably a dumb question but do you have to
unsolder the chip from the long brown carrier? Right now I have an adapter
that I made that connects the brown carrier to the reader. Thanks, I am
very excited that I could finally find these ECU's and complete harnesses.
-Scott Flanagan
'80 Fiat Spider (Awaiting new FI and Turbo)
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
Date: Thu, 15 Sep 1994 04:39:31 -0400
Reply-to: imagecft@netcom.com
From: imagecft@netcom.com (Richard Man)
To: Multiple recipients of list <robot-board@oberon.com>
Subject: (Commercial) HC11 C Compiler
Version 1.02 of the compiler is ready. Also note that there is now a
mailing
list for discussing icc11 and general HC11 programming issues.
// richard
====
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. Standard C header files and library functions.
. HC11 specific support such as embedded assembly, pragma for
declaring
interrupt functions, etc.
. Calling conventions compatible with other compilers.
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Please direct email inquires to: imagecft@netcom.com. To join the
mailing list,
send the message "subscribe icc11-list" to listserv@netcom.com.
----
(*) The following ANSI C features are not yet supported, but most are
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-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
I'd highly recommend
the Hugh McInnes book TURBOCHARGING-
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Electronic boost control can be established really cheap by getting a wastegate
modulator valve off a '86-'87 Buick GN. It takes a variable pulse width and
an input pressure line from the manifold and outputs a variable pressure based
on the pulse width. Feed this pressure back into a conventional screw-type
wastegate, and you have the control you seek. The '91-'92-'93 Syclone/Typhoon
also uses this, as does some of the Sunbird turbos I think.
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
'87-'90 2.0 liter Turbo cars [VIN engine code "M"]
Sunbird, Skyhawk, Calais, Grand Am, Skylark
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$From: peter paul fenske <pfenske@direct.ca>
$Subject: Re: Turbo Sunbird
$Date: Wed, 31 Dec 1997 12:46:58 -0800
Hi Mike
Depends on flavor.
If it is a C3 ecm, two ecm connectors, the chip is enclosed
in a black plastic holder and is a 27C32 at least it can
be read this way..
If it is in the Big blue package with the 60 pin connector
It is a 27C128. Sometimes they are 27C256s also
You need to make a cheapy adapter to read the package.
Just so the eprom plugs into the adapter
For the C3 invoke you checksum function from 0002 to 0FFF
The bytes should be the same as 0000,0001
For the P4 big blue invoke the checksum function in your
programmer from 0008 to 3FFF for the 16 k and
0008 to 7FFF for the 32 K
The bytes should be the same as 0006,0007
tnx again Peter
-<><><><><><><><><><><><><><><><><><><><><><><><><><><><><><>-
$Date: Wed, 31 Dec 1997 12:19:06 -0800
$From: Carl Summers <InnovativeTechnologies@worldnet.att.net>
$Subject: Re: Turbo Sunbird
Michael J Weber wrote:
Should be a 27c256.....
-Carl Summers
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$Date: Fri, 02 Jan 1998 08:10:27 -0600
$From: "John A. Hess" <johnhess@cris.com>
$Subject: Re: Turbo Sunbird
The "special" adapter is not all that complicated. Just get yourself a PC board
IDE header,. cut it to the number of pins that the EPROM actually uses (28), and
spread the pins to fit your EPROM ZIF socket. Works fine and lasts a long time.
H8carbs wrote:
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$From: ECMnut@aol.com
$Date: Thu, 5 Feb 1998 12:53:31 EST
$Subject: Re: AN Fittings
Bruce,
sorry, that was supposed to go to Peter.
I was trying to remember the name of the meeeen motor
cycle gang in the old Beach-Blanket-Bingo movie.
Enjoyed the part-throttle cruising notes..
Have you checked out the Sunbird doc yet?
All of the parameters in the Sunbird Turbo chip
line up perfectly with the SyTy chip. Did I send
you the address dump from PronGrammer?
It lists all the addressses down the left hand side...
Mike V.
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$From: ECMnut@aol.com
$Date: Fri, 13 Feb 1998 15:43:10 EST
$Subject: Re: GM 1227148 ECM Question
In a message dated 98-02-13 13:31:31 EST, you write:
<< Why wouldn't you want to use a 1227749, that was used
with the 4's..
Uhh... I'm not sure how make it work with a distrbutorless engine.
The Turbo Sunbird & Syphoons had distributor caps & one coil.
I'm not sure about the quad-4s that used that ECM...
If thet were distributorless, I better ake a closer look.
I think many Quad 4s used something other than the 749...
Thanks
I'm always trying to get out of any work!
Mike V
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